Hojun-Cho
cbcc0167ae
Seven fixes across the toolchain, plus three new lib/hash modules
(adler32, crc16, crc32) that surfaced them.
1. `~x` on u8/u16/u32 left the upper bits set: NOTQ inverts the
whole 64-bit register and nothing trimmed it back to type
width, so a returned `u16` would compare 64-bit against a
typed literal and disagree. Both stages now mask after NOTQ
for narrow unsigned: AND $0xFF/0xFFFF for u8/u16, MOVL r,r for
u32 (ANDQ $0xFFFFFFFF sign-extends imm32 and is a no-op).
Signed narrows stay sign-extended and need no fix-up. See
cmd/w6c/cgen.c N_UN TK_TILDE and selfhost cgenexpr.ww cgun
TK_TILDE with new nodeprimwidth helper.
2. w6a had no D_CONST immediate path for ANDQ / ORQ. cgen would
emit `ANDQ $65535, AX` and the rr encoder silently wrote
`21 /r` with garbage reg fields — the mask never happened.
Added `81 /4` (AND) and `81 /1` (OR) imm32 paths in both
cstage and selfhost w6a. The ~width fix above depends on this.
3. `s: []u8` cast as a direct fn argument produced a 0-length
slice. cgexpr for N_CAST left (AX=ptr, BX=len) from the str
source but never set CX (cap), and the arg-push fallback only
pushed AX. cgcast now synthesises CX=BX when target is slice
and source is str; node_isslice / arg-push recognise
cast-to-slice and emit the full (cap, len, ptr) triple. Both
stages.
4. `*[N]T` element-store used 8-byte stride + MOVQ regardless of
T's width. Indexing `buf: *[4]u16` would step 8 bytes and
write 8 bytes per element. Added idx_eff (drills *[N]T → T)
in cstage and the matching pointer-array drill in selfhost
elemsizeof. Also added MOVW / MOVZWQ / MOVSWQ to w6c, w6a,
and selfhost mirrors so 2-byte element stores/loads use the
right opcode (was falling through to MOVQ and trailing 6 bytes
into the next slot).
5. Slicing a top-level fixed array (`g[0:n]` where `g: [N]T` is
a global) computed the base from BP instead of the symbol —
localfind returned 0 and the cgen treated it as a local at
offset 0. Both N_SLICE-as-expression (cgslice) and N_SLICE-
as-call-arg paths now check let_islet / letvartnode and emit
LEAQ name(SB) when the base is a global array (or MOVQ
name(SB) for a global slice/pointer base). Both stages.
6. Top-level `let arr: [N]T = [v0, v1, ...]` link-failed on
cstage — emit_lets bailed when it saw N_ARRLIT init on an
array type, and the sz==8 scalar path then misemitted any
8-byte-sized array (e.g. [4]u16, [8]u8) as a single quad.
emit_lets now walks N_ARRLIT, evaluates each element as an
int/rune/bool/nil literal, packs per-element bytes
little-endian, and honours the trailing `...` repeat marker.
Selfhost already handled the literal-init path; fixed the
parallel sz==8 duplicate-DATAW emit on its side (the array
and the scalar paths both fired, last write winning at link
but the duplicate broke cross-stage byte-identicality on user
code with this shape).
7. w6a's per-line input buffer was a 1KB stack `char buf[1024]`.
A `DATAW` for a [256]u16 emits ~2080 bytes on one line, which
truncated mid-escape; the assembler then re-parsed the
remaining tail as garbage opcodes ("unknown opcode"). Bumped
cstage w6a to a 32K static buffer (selfhost w6a already
allocated per-line via amalloc).
lib: lib/hash/adler32, lib/hash/crc16, lib/hash/crc32 — pure
buffer-subset shape (matching lib/hash/fnv), with per-module
*_test.ww runnable via `ww test lib/hash/<name>`. Adler-32 plus
CRC-16 (CCITT/CMDA2000/DECT/ANSI) and CRC-32 (IEEE/Castagnoli/
Koopman) cover Hare's reference vectors bit-for-bit. Wired into
test/wcc/900_stdlib.c. .gitignore: lib/**/*.s,*.o so `ww test`
droppings stay untracked.
`make test` (26/26), `make bootstrap` (ww2≡ww3≡ww4), and per-module
`ww test` all pass. cgen output is byte-identical across cstage and
selfhost for every repro that previously diverged.
115 lines
2.5 KiB
C
115 lines
2.5 KiB
C
/*
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* 6.out.h — amd64 instruction enum + register names. Mirrors the
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* Plan 9 6c shape (cmd/6c/6.out.h) but trimmed to the subset that
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* w6c emits and w6a consumes in this bootstrap. Each new opcode added
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* here must also gain encoding support in cmd/w6a/asm.c.
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*/
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#ifndef SIX_OUT_H
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#define SIX_OUT_H
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/* registers — Plan 9 names; lowercase = 8-bit, etc. We use 64-bit. */
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enum {
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D_NONE = 0,
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/* general purpose 64-bit */
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D_AX, D_CX, D_DX, D_BX,
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D_SP, D_BP, D_SI, D_DI,
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D_R8, D_R9, D_R10, D_R11,
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D_R12, D_R13, D_R14, D_R15,
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/* SSE/XMM 64-bit float regs */
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D_X0, D_X1, D_X2, D_X3,
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D_X4, D_X5, D_X6, D_X7,
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D_X8, D_X9, D_X10, D_X11,
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D_X12, D_X13, D_X14, D_X15,
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/* pseudo regs (Plan 9) */
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D_PSP, /* SP pseudo (frame-relative) */
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D_PFP, /* FP pseudo (incoming args) */
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D_PSB, /* SB pseudo (static base) */
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/* operand kinds; not registers but share the slot */
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D_CONST, /* $N immediate */
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D_BRANCH, /* label reference */
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D_EXTERN, /* external symbol */
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D_INDIR /* offset(reg) memory */
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};
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/* opcodes — the small set we currently emit & encode */
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enum {
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A_NOP = 0,
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A_TEXT,
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A_DATA,
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A_DATAW, /* writable DATA: lands in .data (RW) instead of .text */
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A_DATAR, /* reloc-only: patch a 64-bit slot in .data with a
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* symbol's runtime VA. Pairs with a prior DATAW
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* that left zero placeholder bytes. */
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A_GLOBL,
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A_END,
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A_MOVQ,
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A_MOVL,
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A_MOVW,
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A_MOVB,
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A_MOVZBQ, /* movzx r64, r/m8 — load byte zero-extended */
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A_MOVZWQ, /* movzx r64, r/m16 — load word zero-extended */
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A_MOVSXD, /* movsxd r64, r/m32 — load i32 sign-extended */
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A_MOVSWQ, /* movsx r64, r/m16 — load word sign-extended */
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/* SSE2 scalar double-precision float */
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A_MOVSD, /* xmm/m → xmm and xmm → m */
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A_ADDSD,
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A_SUBSD,
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A_MULSD,
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A_DIVSD,
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A_UCOMISD,
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A_CVTTSD2SI, /* truncate f64 → i64 */
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A_CVTSI2SD, /* convert i64 → f64 */
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/* SSE scalar single-precision float (f32). Same xmm regs. */
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A_MOVSS,
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A_ADDSS,
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A_SUBSS,
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A_MULSS,
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A_DIVSS,
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A_UCOMISS,
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A_CVTTSS2SI,
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A_CVTSI2SS,
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A_CVTSD2SS, /* f64 → f32 truncate */
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A_CVTSS2SD, /* f32 → f64 widen */
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A_ADDQ,
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A_SUBQ,
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A_IMULQ,
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A_IDIVQ,
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A_DIVQ, /* unsigned 64-bit divide; sibling of IDIVQ */
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A_NEGQ,
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A_NOTQ,
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A_ANDQ,
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A_ORQ,
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A_XORQ,
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A_SHLQ,
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A_SHRQ,
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A_CMPQ,
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A_PUSHQ,
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A_POPQ,
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A_LEAQ,
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A_CALL,
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A_RET,
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A_JMP,
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A_JE, A_JNE,
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A_JL, A_JLE, A_JG, A_JGE,
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A_JB, A_JBE, A_JA, A_JAE,
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A_JZ, A_JNZ,
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A_SYSCALL,
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A_LAST
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};
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const char *anames(int); /* opcode -> mnemonic */
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const char *rnames(int); /* register -> name */
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#endif
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