Hojun-Cho f940072623 test/run: per-test + per-phase wall-clock timing (test-perf step 0) ...

Emits a timing block (durations, phase walls, total) before the summary
line; the ok/FAIL and 'all N passed' contract is unchanged and the only
consumer (make's exit-code gate) is unaffected. Measured baseline at
4ff79bf: 211.6s wall, 990-995 self-compile gates = 87% of wall — the
content-keyed skip tier (T1) targets exactly that block. Baseline data:
.ai/testperf-baseline.md.

2026-06-10 15:33:24 +09:00

..

wcc

ww: loud fatal on unresolvable import, inline-package aware (#16 ENFORCE-driver)

2026-06-10 15:19:10 +09:00

run

test/run: per-test + per-phase wall-clock timing (test-perf step 0)

2026-06-10 15:33:24 +09:00