Phase A.5's tupleelemslot / fieldslotsize hardcoded 16u64 for TY_STR and 24u64 for TY_SLICE — bypassing the tinfo.size SSoT seeded by lib/ww/typ.ww:189 (the very pivot they were introduced to consult). Route those four arms through pt.size / ft.size so #1 (str→24) and #34 (slice graduation) land as a one-line bump at the seed. lib/strings/stringstest.ww carried 12 `(cap: u64) * 16u64` strides missed by #43's sweep over strings.ww + shlex.ww; convert to `* size(str): u64` so the #42 fold owns the constant. Doc comments in strings.ww (freeall + splitn) updated to the same SSoT form. No-op at today's str.size=16 / slice=24: tinfo.size already matches the literals these arms had baked in. Reviewer's pre/post asm-identity probe (struct{i64,str,i64} + (i32,str,i32) tuple + bare str) shows zero-byte diff. 131/131 + 994 + 995 + bootstrap (ww2==ww3==ww4) green. Forward-link to #1 (str→24B bump) and #64 (sizelint pre-commit gate); #65 filed for lib/bytes + lib/getopt sibling sites the reviewer surfaced. Forward of #64 will catch any future regressions of this class.
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