Hojun-Cho 3e9a6955e7 wcc_ww/cgen: #88 defisaddressable array leg chases the stamped def type ...

The `&D` addressability gate (defisaddressable, cgen.ww) keyed its
array leg on the UNCHASED syntactic dtnode (N_TARRAY) — a def whose
declared type is an ALIAS of an array missed the gate and fell to the
rule-7 loud error, but the gate was lying: the ww def-array DATA
emitter (emitdefconstants' array arm) already peels TY_NAMED off
d.lhs.type_ transitively, so the alias def HAS a DATA symbol
(probe-OBSERVED: `DATA main.D(SB)` emitted byte-id by both stages for
the &-less program). Gate-only fix — tichase(dtn.type_) == TY_ARRAY —
restores gate == emission set exactly; no emitter twin, no half-state.
The struct leg (defvarstructinfo) already chased; plain [N]T defs
agree under tnode and chased reads, so existing rows are
byte-id-neutral by construction. cstage gates TK_AMP on the
def_isarraydef registry fed by the g-fold-G1 chased let_isarray
(cgen.c:3975-3977, 1446) and runs every row 0 — align ww UP.

Pin: 944_alias_def_addr_run, 6 rows (plain + struct-def controls
hold 0/0; 1/2-level alias + fwd-ref decl order graduate ww-LOUD ->
0/0 byte-id; str-def &S error-path STAYS LOUD both stages with a
byte-identical diagnostic — the rule-7 tail text is compared w6c vs
w6c_ww, so a silent reject or a divergent message both fail the row).
def_l2's readback casts to the base array ptr: the natural (*p)[2]
spelling over a 2-LEVEL-alias pointee trips a SEPARATE pre-existing
CSTAGE double-deref (spurious MOVQ (AX),AX, SEGV; def-independent, ww
correct) — filed as task #93 (#85 type_unwrap kin, F2b OUT), not
fixed here (site-set form).

Light gates: test-unit 290 green; sizelint 0; 989 ratchet zero flips;
five-mains NEUTRAL vs master-74195ac scratch on identical inputs +
cs==ww on all five. combined.ww regens ride along (#110).

2026-06-05 23:38:41 +09:00

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