wcc: widen-push spills the float payload from X0, both stages
Widening a runtime f64 into a tagged slot pushed a stale AX as the payload while the value sat in X0 — both stages shared the push bug (float literals dodged it because TK_FLOAT loads AX too); the divergent pop sides then produced different garbage. Spill the payload from X0 (MOVSD) with the variant tag. Review item #49. Both stages move in one commit: one emission contract; splitting would leave the byte-id gates red between the halves.
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@@ -3108,7 +3108,20 @@ cg_widen_tagged_push(Cg *c, Local **locals_p, Type *dst, Node *src, int sz)
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ins2(c, A_XORQ, areg(D_DX), areg(D_DX));
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ins1(c, A_PUSHQ, areg(D_DX));
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}
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ins1(c, A_PUSHQ, areg(D_AX)); /* value at +8 */
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/* #49: an f64/f32 payload sits in X0 (cgexpr left it there),
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* not AX — spill it through the stack so the callee reads the
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* real bits. A plain PUSHQ AX pushed whatever AX last held
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* (stale for a runtime float producer; only a const folder
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* leaves the bits in AX, which is why #48's no-payload-read arm
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* passed but #49's `d == 2.5` read did not). Both stages
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* (#263); wwstage cgenutil.ww scalar-variant twin. */
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if (node_isfloat(src)) {
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int fmov = node_isf32(src) ? A_MOVSS : A_MOVSD;
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ins2(c, A_SUBQ, aimm(8), areg(D_SP));
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ins2(c, fmov, areg(D_X0), amem(D_SP, 0));
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} else {
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ins1(c, A_PUSHQ, areg(D_AX)); /* value at +8 */
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}
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ins2(c, A_MOVQ, aimm(tag), areg(D_AX));
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ins1(c, A_PUSHQ, areg(D_AX)); /* tag at +0 */
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return;
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@@ -18215,7 +18215,24 @@ fn pushargsrev(c: *cgen, arg: *node, param: *node, memphase: bool) i32 = {
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emitline("\tPUSHQ\tDX\n");
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pp -= 8;
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};
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emitline("\tPUSHQ\tAX\n");
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// #49: an f64/f32 payload sits in X0 (cgexpr left it
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// there), not AX — spill it through the stack so the
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// callee reads the real bits. A plain PUSHQ AX pushed
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// whatever AX last held (stale for a runtime float
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// producer; only a const folder leaves the bits in AX
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// — why #48 with a no-payload-read arm passed but #49
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// reading `d == 2.5` did not). Both stages (#263);
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// cstage cg_widen_tagged_push twin.
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if (isfloattype(c, arg)) {
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emitline("\tSUBQ\t$8, SP\n");
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let fmov: str = "MOVSD";
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if (isf32type(c, arg)) { fmov = "MOVSS"; };
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emitline("\t");
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emitline(fmov);
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emitline("\tX0, (SP)\n");
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} else {
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emitline("\tPUSHQ\tAX\n");
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};
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emitline("\tMOVQ\t$");
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emitint(widentag: i64);
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emitline(", AX\n");
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@@ -501,7 +501,24 @@ fn pushargsrev(c: *cgen, arg: *node, param: *node, memphase: bool) i32 = {
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emitline("\tPUSHQ\tDX\n");
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pp -= 8;
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};
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emitline("\tPUSHQ\tAX\n");
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// #49: an f64/f32 payload sits in X0 (cgexpr left it
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// there), not AX — spill it through the stack so the
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// callee reads the real bits. A plain PUSHQ AX pushed
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// whatever AX last held (stale for a runtime float
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// producer; only a const folder leaves the bits in AX
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// — why #48 with a no-payload-read arm passed but #49
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// reading `d == 2.5` did not). Both stages (#263);
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// cstage cg_widen_tagged_push twin.
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if (isfloattype(c, arg)) {
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emitline("\tSUBQ\t$8, SP\n");
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let fmov: str = "MOVSD";
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if (isf32type(c, arg)) { fmov = "MOVSS"; };
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emitline("\t");
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emitline(fmov);
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emitline("\tX0, (SP)\n");
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} else {
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emitline("\tPUSHQ\tAX\n");
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};
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emitline("\tMOVQ\t$");
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emitint(widentag: i64);
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emitline(", AX\n");
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@@ -18215,7 +18215,24 @@ fn pushargsrev(c: *cgen, arg: *node, param: *node, memphase: bool) i32 = {
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emitline("\tPUSHQ\tDX\n");
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pp -= 8;
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};
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emitline("\tPUSHQ\tAX\n");
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// #49: an f64/f32 payload sits in X0 (cgexpr left it
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// there), not AX — spill it through the stack so the
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// callee reads the real bits. A plain PUSHQ AX pushed
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// whatever AX last held (stale for a runtime float
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// producer; only a const folder leaves the bits in AX
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// — why #48 with a no-payload-read arm passed but #49
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// reading `d == 2.5` did not). Both stages (#263);
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// cstage cg_widen_tagged_push twin.
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if (isfloattype(c, arg)) {
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emitline("\tSUBQ\t$8, SP\n");
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let fmov: str = "MOVSD";
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if (isf32type(c, arg)) { fmov = "MOVSS"; };
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emitline("\t");
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emitline(fmov);
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emitline("\tX0, (SP)\n");
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} else {
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emitline("\tPUSHQ\tAX\n");
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};
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emitline("\tMOVQ\t$");
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emitint(widentag: i64);
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emitline(", AX\n");
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@@ -97,6 +97,32 @@ static const struct row rows[] = {
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" let d: f64 = 3.5;\n"
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" return g(d);\n"
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"};\n", 2, K_RUN, NULL },
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/* #49 (#263 both-stages): a RUNTIME f64 producer (mk) feeds a value
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* widened into (f64|void), and the f64 arm READS the payload
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* (d == 2.5). Pre-fix the widen-PUSH did `PUSHQ AX` for the payload
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* while the f64 sat in X0, so d read stale bits → 1 (cs) / 3 (ww,
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* the #48 pop divergence compounding). #48's arm dodged this by not
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* reading the payload; this one catches the stale-AX push. Both
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* stages now spill X0 → 0. (After the c4 drain fix the two stages
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* already agree on the pop; this push fix closes the shared bug.) */
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{ "runtime_float_widen_payload",
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"package main;\n"
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"type fv = (f64 | void);\n"
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"fn mk(x: f64) f64 = { return x + 1.5; };\n"
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"fn take(v: fv) i32 = {\n"
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" match (v) {\n"
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" case let d: f64 => {\n"
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" if (d == 2.5) { return 0; };\n"
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" return 1;\n"
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" };\n"
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" case void => { return 2; };\n"
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" };\n"
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" return 3;\n"
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"};\n"
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"export fn main() i32 = {\n"
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" let d: f64 = mk(1.0);\n"
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" return take(d);\n"
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"};\n", 0, K_RUN, NULL },
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};
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static int
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