cstage+selfhost+test: cgreturn TY_STRUCT <=24B via AX/DX/CX
Whole-struct return ABI for sizes <=24B. Both stages materialise rhs
into a zero-padded 24B @retscr scratch slot, then load AX=bytes[0..7],
DX=bytes[8..15], CX=bytes[16..23] unconditionally — three MOVQs
regardless of declared struct size, so the receive side (landing in
task #5) can read all three words and mask by the declared size. R8
stays reserved for the tagged-return 4th word; the uniform-MOVQ shape
is cheap over a size-conditional partial-load and keeps the producer
diff vs the existing tagged-return AX/DX/CX/R8 path minimal.
Two rhs shapes wired this pass: N_IDENT (word-copy from rhs local slot,
MOVQ pairs + MOVL/MOVB tail bounded by declared struct size) and
N_STRUCTLIT (field-walk; tagged fields delegate to the existing tagged
widening helper, float fields go through X0, int fields use MOVQ/MOVL/
MOVB by field size). Sizes >24B fall through to the existing scalar
path (only AX gets the first qword), pending sret in a future task.
N_CALL chain-return (`return otherfn()`) is deferred to task #5's
receive side — until that lands the call-result lives in caller regs.
The wwstage mirror in cgenstmt.ww matches cgen.c byte-for-byte on the
new branch; cgendecl.ww's scanlocals pre-reserves 24B for @retscr under
the same predicate (N_RETURN, fnret is N_TNAME, structlookup hit,
totsize<=24, rhs is N_IDENT|N_STRUCTLIT) since wwstage writes its
prologue SUBQ from the upfront frame total — cstage patches SUBQ at fn
end so it can allocate inline.
Latent fsz==2 MOVW divergence between stages (cstage structlit int-
branch only special-cases fsz 1/4, wwstage's fieldstoreop also returns
MOVW for fsz==2) tracked as task #13; not exercised by the new fixtures
or by any current selfhost <=24B struct return.
main.combined.ww files also pick up worker-checkfix's wwstage
architectural comment from 7f60ebb (auto-regen ran after that commit).
This commit is contained in:
256
test/wcc/698_cgreturn_struct.c
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256
test/wcc/698_cgreturn_struct.c
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@@ -0,0 +1,256 @@
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/*
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* 698_cgreturn_struct — whole-struct return ABI for sizes <= 24B.
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*
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* Pre-#7: `return s;` from a struct-returning fn fell through to the
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* scalar path: only the first 8 bytes of the struct made it to AX,
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* the rest was silently dropped. Compounded with the receive side
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* (#5 N_ASSIGN whole-STRUCT rhs) being unwired, struct returns were
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* a no-op end-to-end.
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*
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* #7 wires the producer side: cgreturn now materialises the struct
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* into a zero-padded 24B scratch slot (`@retscr`), then loads
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* AX/DX/CX from the slot unconditionally — three MOVQs regardless of
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* declared size — so receiver code (landing in #5) can read all
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* three words and mask by the declared struct size. R8 stays
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* reserved for the tagged-return 4th word; sret for sizes > 24B is
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* a separate future task.
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*
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* What this test pins:
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* - cstage and wwstage emit byte-identical asm for every fixture
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* (the bootstrap byte-identity invariant — if either stage's
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* scanlocals / cgreturn drifts, the diff catches it).
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* - Each fixture compiles+links+runs without crashing under both
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* drivers (proves the prologue SUBQ reserves enough frame for
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* the @retscr scratch; an under-booked frame would smash the
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* saved BP / return address on the load-back).
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* - End-to-end value verification (caller reads AX/DX/CX into a
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* dst slot) is deferred to #5's test surface, since that's the
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* receive side. Until then the call's result is discarded and
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* main returns a literal exit code; we're checking the cgreturn
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* side doesn't crash or produce invalid asm.
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*
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* Coverage: five struct shapes — 8B one-field, 16B two-i64, 24B
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* three-i64 (the headline ABI shape), mixed-alignment i32+i32+i64+i64
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* (totsize 24 with the i32-pair packed), and N_IDENT rhs (let-init
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* then `return p;`) vs N_STRUCTLIT rhs (`return T{...};`). The
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* 25B+ sret case is explicitly OUT OF SCOPE — falls through to the
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* existing scalar path (only AX gets the first qword); not pinned
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* here.
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*/
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include <unistd.h>
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#include <sys/stat.h>
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#include <sys/wait.h>
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static int
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runwait(const char *cmd)
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{
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int rc = system(cmd);
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if (rc == -1) return -1;
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if (WIFEXITED(rc)) return WEXITSTATUS(rc);
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return -1;
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}
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struct row { const char *label; const char *src; int want; };
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static const struct row rows[] = {
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/* 8B single-i64 field: smallest struct return. Exercises the
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* sz=8 path where only AX is meaningful (DX/CX zero-padded). */
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{ "one_i64_lit",
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"type one = struct { v: i64 };\n"
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"fn mk() one = { return one { v = 42i64 }; };\n"
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"fn main() i32 = { mk(); return 0; };\n",
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0 },
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/* 16B two-i64 (the SysV 16B aggregate shape, but routed through
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* our 3-reg path uniformly). N_STRUCTLIT rhs. */
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{ "pair_i64_lit",
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"type pair = struct { a: i64, b: i64 };\n"
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"fn mk() pair = { return pair { a = 1i64, b = 2i64 }; };\n"
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"fn main() i32 = { mk(); return 0; };\n",
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0 },
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/* 24B three-i64 — the headline shape: AX/DX/CX each carry one
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* word, no zero pad needed in scratch. */
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{ "trip_i64_lit",
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"type trip = struct { x: i64, y: i64, z: i64 };\n"
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"fn mk() trip = { return trip { x = 7i64, y = 11i64, z = 13i64 }; };\n"
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"fn main() i32 = { mk(); return 0; };\n",
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0 },
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/* Mixed i32+i32+i64+i64: registerstruct packs two i32s into
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* one quadword (a@0, b@4, c@8, d@16), totsize 24 after tail
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* pad. Exercises the MOVL store-op branch in the structlit
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* field walker. */
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{ "mix_i32_i32_i64_i64_lit",
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"type mix = struct { a: i32, b: i32, c: i64, d: i64 };\n"
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"fn mk() mix = { return mix { a = 3, b = 5, c = 11i64, d = 12i64 }; };\n"
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"fn main() i32 = { mk(); return 0; };\n",
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0 },
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/* N_IDENT rhs: let-init the struct then return it. Exercises
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* the word-copy-from-slot branch (vs the structlit branch
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* above). The let-init zero-fills the slot, so the trailing
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* partial-word handlers (MOVL/MOVB) stay dormant — but the
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* sz=24 path covers all three MOVQ words. */
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{ "trip_i64_ident",
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"type trip = struct { x: i64, y: i64, z: i64 };\n"
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"fn mk() trip = {\n"
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" let p: trip = trip { x = 100i64, y = 200i64, z = 300i64 };\n"
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" return p;\n"
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"};\n"
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"fn main() i32 = { mk(); return 0; };\n",
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0 },
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};
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static int
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run_driver(const char *driver, const struct row *r, int i)
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{
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char src[64], tmpdir[64], cmd[1024];
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snprintf(src, sizeof src, "/tmp/wcrs_%d_%d.ww", getpid(), i);
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snprintf(tmpdir, sizeof tmpdir, "/tmp/wcrs_%d_d_%d", getpid(), i);
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FILE *f = fopen(src, "wb");
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if (!f) return -1;
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fputs(r->src, f);
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fclose(f);
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mkdir(tmpdir, 0755);
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snprintf(cmd, sizeof cmd, "cd %s && %s build %s",
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tmpdir, driver, src);
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if (runwait(cmd) != 0) {
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fprintf(stderr, "row[%s]: build via %s failed\n",
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r->label, driver);
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unlink(src); rmdir(tmpdir);
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return -1;
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}
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const char *base = strrchr(src, '/');
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base = base ? base + 1 : src;
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char outbin[128];
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snprintf(outbin, sizeof outbin, "%s/%s", tmpdir, base);
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char *dot = strrchr(outbin, '.');
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if (dot && strcmp(dot, ".ww") == 0) *dot = '\0';
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int got = runwait(outbin);
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unlink(src); unlink(outbin); rmdir(tmpdir);
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return got;
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}
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/* asm_byte_identical — generate .s via cstage's w6c and wwstage's w6c_ww
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* and diff. Catches scanlocals / cgreturn drift between the two stages,
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* which the bootstrap byte-identity (995_self_rebuild) covers globally
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* but doesn't surface as a focused-fixture failure. */
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static int
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asm_byte_identical(const char *bin, const struct row *r, int i)
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{
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char src[64], cs[64], ws[64], cmd[1024];
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snprintf(src, sizeof src, "/tmp/wcrs_asm_%d_%d.ww", getpid(), i);
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snprintf(cs, sizeof cs, "/tmp/wcrs_asm_%d_%d_c.s", getpid(), i);
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snprintf(ws, sizeof ws, "/tmp/wcrs_asm_%d_%d_w.s", getpid(), i);
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FILE *f = fopen(src, "wb");
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if (!f) return -1;
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fputs(r->src, f);
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fclose(f);
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snprintf(cmd, sizeof cmd, "%s/w6c -o %s %s 2>/dev/null", bin, cs, src);
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if (runwait(cmd) != 0) {
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fprintf(stderr, "row[%s]: w6c errored\n", r->label);
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unlink(src);
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return -1;
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}
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snprintf(cmd, sizeof cmd, "%s/w6c_ww -o %s %s 2>/dev/null",
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bin, ws, src);
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if (runwait(cmd) != 0) {
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fprintf(stderr, "row[%s]: w6c_ww errored\n", r->label);
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unlink(src); unlink(cs);
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return -1;
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}
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FILE *fc = fopen(cs, "rb");
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FILE *fw = fopen(ws, "rb");
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int rc = 0;
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if (!fc || !fw) {
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rc = -1;
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} else {
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for (;;) {
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int a = fgetc(fc);
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int b = fgetc(fw);
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if (a != b) { rc = -1; break; }
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if (a == EOF) break;
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}
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}
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if (fc) fclose(fc);
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if (fw) fclose(fw);
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if (rc != 0)
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fprintf(stderr, "row[%s]: cstage vs wwstage asm differs\n",
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r->label);
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unlink(src); unlink(cs); unlink(ws);
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return rc;
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}
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int
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main(void)
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{
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const char *bin = getenv("BIN");
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if (!bin) bin = "out/bin";
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char absbin[1024];
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if (bin[0] != '/') {
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char cwd[1024];
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if (getcwd(cwd, sizeof cwd) == NULL) return 1;
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snprintf(absbin, sizeof absbin, "%s/%s", cwd, bin);
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bin = absbin;
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}
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char cdrv[1024];
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snprintf(cdrv, sizeof cdrv, "%s/ww", bin);
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char wdrv[1024];
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snprintf(wdrv, sizeof wdrv, "%s/ww_ww", bin);
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struct { const char *name; const char *path; int gated_on_existence; }
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drivers[] = {
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{ "cstage", cdrv, 0 },
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{ "wwstage", wdrv, 1 },
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{ NULL, NULL, 0 },
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};
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int n = (int)(sizeof rows / sizeof rows[0]);
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int total = 0, fail = 0;
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/* Compile+run for each (driver, row). */
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for (int d = 0; drivers[d].name; d++) {
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if (drivers[d].gated_on_existence
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&& access(drivers[d].path, X_OK) != 0) {
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fprintf(stderr, "cgreturn_struct: skip %s (no %s)\n",
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drivers[d].name, drivers[d].path);
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continue;
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}
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for (int i = 0; i < n; i++) {
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int got = run_driver(drivers[d].path, &rows[i], i);
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total++;
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if (got != rows[i].want) {
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fprintf(stderr,
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"cgreturn_struct[%s][%s]: exit=%d want=%d\n",
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drivers[d].name, rows[i].label,
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got, rows[i].want);
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fail++;
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}
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}
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}
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/* Asm byte-identity diff, only when both stages exist. */
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if (access(wdrv, X_OK) == 0) {
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for (int i = 0; i < n; i++) {
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total++;
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if (asm_byte_identical(bin, &rows[i], i) != 0)
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fail++;
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}
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}
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if (fail) {
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fprintf(stderr,
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"cgreturn_struct: %d/%d fixtures failed\n", fail, total);
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return 1;
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}
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printf("cgreturn_struct: %d/%d ok\n", total, total);
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return 0;
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}
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Reference in New Issue
Block a user