diff --git a/Makefile b/Makefile index 061b075d..e18e004d 100644 --- a/Makefile +++ b/Makefile @@ -226,6 +226,7 @@ TESTS = $(BIN)/test_smoke $(BIN)/test_lex $(BIN)/test_parse $(BIN)/test_check \ $(BIN)/test_match_bind_struct \ $(BIN)/test_modtype_leaf_collision \ $(BIN)/test_samemod_prefer \ + $(BIN)/test_cgreturn_struct \ $(BIN)/test_field_signed $(BIN)/test_frame_argcount \ $(BIN)/test_selfhost $(BIN)/test_w6a_ww $(BIN)/test_w6l_ww \ $(BIN)/test_w6c_ww $(BIN)/test_ww_ww $(BIN)/test_self_rebuild \ @@ -365,6 +366,12 @@ $(BIN)/test_samemod_prefer: test/wcc/697_samemod_prefer.c \ $(LIB)/libwwrt.a | $(BIN) $(CC) $(CFLAGS) -o $@ $< +$(BIN)/test_cgreturn_struct: test/wcc/698_cgreturn_struct.c \ + $(BIN)/ww $(BIN)/w6c $(BIN)/w6a $(BIN)/w6l \ + $(BIN)/ww_ww $(BIN)/w6c_ww $(BIN)/w6a_ww $(BIN)/w6l_ww \ + $(LIB)/libwwrt.a | $(BIN) + $(CC) $(CFLAGS) -o $@ $< + $(BIN)/test_field_signed: test/wcc/660_field_signed.c $(BIN)/ww \ $(BIN)/w6c $(BIN)/w6a $(BIN)/w6l \ $(BIN)/ww_ww $(BIN)/w6c_ww $(BIN)/w6a_ww $(BIN)/w6l_ww \ diff --git a/cmd/w6c/cgen.c b/cmd/w6c/cgen.c index e6a2bae9..3ee1b5a7 100644 --- a/cmd/w6c/cgen.c +++ b/cmd/w6c/cgen.c @@ -5640,6 +5640,130 @@ cgstmt(Cg *c, Node *n, Local **locals, int *frame) break; } } + /* Whole-struct return for sizes ≤24B. ABI: AX=bytes[0..7], + * DX=bytes[8..15], CX=bytes[16..23]. Sizes >24B are not + * wired (sret deferred); they fall through to the scalar + * path below and return only AX. Materialise rhs into a + * zero-padded 24B scratch slot, then emit AX/DX/CX loads + * unconditionally so the instruction shape is constant + * regardless of declared struct size. The receive side + * masks via the dst slot's declared size. Two rhs shapes + * are wired: N_IDENT (word-copy from rhs local slot) and + * N_STRUCTLIT (field-by-field store at scratch+foff). Call- + * result chain return is deferred to #5's receive side. */ + if (n->lhs && cg_ret_type) { + Type *rt = cg_ret_type; + if (rt->kind == TY_NAMED) rt = rt->under; + if (rt && rt->kind == TY_STRUCT && rt->size <= 24 + && (n->lhs->kind == N_IDENT + || n->lhs->kind == N_STRUCTLIT)) { + int sz = (int)rt->size; + const char *scrn = mklabel(c, "retscr"); + int scr = local_alloc(c, locals, scrn, 24, + cg_frame); + ins2(c, A_XORQ, areg(D_AX), areg(D_AX)); + ins2(c, A_MOVQ, areg(D_AX), + amem(D_BP, scr + 0)); + ins2(c, A_MOVQ, areg(D_AX), + amem(D_BP, scr + 8)); + ins2(c, A_MOVQ, areg(D_AX), + amem(D_BP, scr + 16)); + if (n->lhs->kind == N_STRUCTLIT) { + for (Node *f = n->lhs->list; f; + f = f->next) { + u64 foff = 0; + int fsz = 8; + Type *ft = NULL; + for (Tfield *fl = rt->fields; + fl; fl = fl->next) { + if (strcmp(fl->name, + f->str) == 0) { + foff = fl->offset; + fsz = (int)(fl->type + ? fl->type->size + : 8); + ft = fl->type; + break; + } + } + Type *fu = (ft && ft->kind + == TY_NAMED) + ? ft->under : ft; + if (fu && fu->kind + == TY_TAGGED) { + cg_widen_tagged_store(c, + locals, fu, f->lhs, + D_BP, + scr + (int)foff, + (int)fu->size); + continue; + } + cgexpr(c, f->lhs, *locals); + int sl_isf32 = 0; + if (fld_isfloat(ft, + &sl_isf32)) { + int mov = sl_isf32 + ? A_MOVSS + : A_MOVSD; + ins2(c, mov, + areg(D_X0), + amem(D_BP, + scr + (int)foff)); + continue; + } + int op = A_MOVQ; + if (fsz == 1) op = A_MOVB; + else if (fsz == 4) op = A_MOVL; + ins2(c, op, areg(D_AX), + amem(D_BP, + scr + (int)foff)); + } + } else { + /* N_IDENT: word-copy rhs slot into + * scratch. Whole 8B words via MOVQ; + * trailing partial word via MOVL/MOVB + * so we read no further than the + * source slot's declared size. */ + int rhsoff = localfind(*locals, + n->lhs->str); + int k = 0; + while (k + 8 <= sz) { + ins2(c, A_MOVQ, + amem(D_BP, rhsoff + k), + areg(D_AX)); + ins2(c, A_MOVQ, areg(D_AX), + amem(D_BP, scr + k)); + k += 8; + } + while (k + 4 <= sz) { + ins2(c, A_MOVL, + amem(D_BP, rhsoff + k), + areg(D_AX)); + ins2(c, A_MOVL, areg(D_AX), + amem(D_BP, scr + k)); + k += 4; + } + while (k < sz) { + ins2(c, A_MOVB, + amem(D_BP, rhsoff + k), + areg(D_AX)); + ins2(c, A_MOVB, areg(D_AX), + amem(D_BP, scr + k)); + k += 1; + } + } + ins2(c, A_MOVQ, amem(D_BP, scr + 0), + areg(D_AX)); + ins2(c, A_MOVQ, amem(D_BP, scr + 8), + areg(D_DX)); + ins2(c, A_MOVQ, amem(D_BP, scr + 16), + areg(D_CX)); + ins2(c, A_MOVQ, areg(D_BP), areg(D_SP)); + ins1(c, A_POPQ, areg(D_BP)); + ins0(c, A_RET); + break; + } + } if (n->lhs && node_isstr(n->lhs)) { cgexpr(c, n->lhs, *locals); /* AX=ptr, BX=len */ ins2(c, A_MOVQ, areg(D_BX), areg(D_DX)); diff --git a/selfhost/cmd/w6c/main.combined.ww b/selfhost/cmd/w6c/main.combined.ww index 5c1b3597..91576ddc 100644 --- a/selfhost/cmd/w6c/main.combined.ww +++ b/selfhost/cmd/w6c/main.combined.ww @@ -4830,6 +4830,20 @@ fn declmod(file: *node, d: *node) str = { // installdecl — install the top-level decl's name into the top scope. // We don't compute its type yet (that's the resolve pass) — just bind // the name so forward references resolve. +// +// Architectural note: wwstage uses COEXISTENCE rather than the cstage +// promote-SK_USE-in-place approach in cmd/wcc/check.c. SK_USE and any +// same-leaf SK_TYPE/SK_FN/SK_DEF/SK_VAR live as separate entries in +// the same scope-bucket, distinguished by `sym.mod`. The dot-prefix +// lookup in resolvewalk + scopelookupinmodule's mod-filter already +// disambiguate `fnmatch.flag` against an `fn fnmatch(...)` of the same +// leaf — no `use_alias` flag needed. So the cstage L1722-class bug +// (promotion missing use_alias) is structurally non-reachable here. +// Don't port the use_alias flag from cstage without first re-reading +// the architecture: adding a field to `sym` changes its size and risks +// the wwstage cgen amalloc-undersize trap (rob-pike). #11 (wwstage +// checkfile pass) will reconsider this when wwstage grows a real check +// pass on the cgen path. fn installdecl(c: *checker, file: *node, d: *node) void = { if (d == nil) { return; }; let k: nkind = d.kind; @@ -13671,6 +13685,146 @@ fn cgreturn(c: *cgen, n: *node) void = { c.lastwasreturn = 1; return; }; + // Whole-struct return for sizes <= 24B. ABI: AX=bytes[0..7], + // DX=bytes[8..15], CX=bytes[16..23]. Mirrors cstage cgen.c + // N_RETURN TY_STRUCT branch. Two rhs shapes are wired: + // N_IDENT (word-copy from rhs local slot) and N_STRUCTLIT + // (field-by-field store at scratch+foff, with tagged fields + // delegated to cgwidentaggedstore). Call-result chain return + // is deferred to #5's receive side. Sizes > 24B fall through + // to the scalar path below (only AX gets the first qword), + // pending sret. + let rname: str; + rname.ptr = nil; rname.len = 0; + if (c.fnret != nil) { + if (c.fnret.kind == nkind.N_TNAME) { + rname = c.fnret.str; + }; + }; + if (rname.len > 0) { + let rsi: *structinfo = structlookup(c, rname); + if (rsi != nil) { + let rsz: i32 = rsi.totsize; + if (rsz <= 24) { + let okrhs: bool = false; + if (rhs.kind == nkind.N_IDENT) { + okrhs = true; + }; + if (rhs.kind == nkind.N_STRUCTLIT) { + okrhs = true; + }; + if (okrhs) { + let scroff: i32 = localadd(c, + "@retscr", 24, nil); + emitline("\tXORQ\tAX, AX\n"); + emitline("\tMOVQ\tAX, "); + emitoff(scroff: i64); + emitline("(BP)\n"); + emitline("\tMOVQ\tAX, "); + emitoff((scroff + 8): i64); + emitline("(BP)\n"); + emitline("\tMOVQ\tAX, "); + emitoff((scroff + 16): i64); + emitline("(BP)\n"); + if (rhs.kind == nkind.N_STRUCTLIT) { + let fn_: *node = rhs.list; + for (fn_ != nil) { + if (fn_.kind == nkind.N_FIELD) { + let fi: *fieldinfo = rsi.fields; + for (fi != nil) { + if (streq(fi.fname, fn_.str)) { + if (istaggedtype(c, fi.tnode)) { + cgwidentaggedstore(c, + fi.tnode, fn_.lhs, + "BP", + scroff + fi.foff, + fi.fsz); + fi = nil; + } else { + cgexpr(c, fn_.lhs); + if (isfloattype(c, fi.tnode)) { + let mov: str = "MOVSD"; + if (isf32type(c, fi.tnode)) { + mov = "MOVSS"; + }; + emitline("\t"); + emitline(mov); + emitline("\tX0, "); + emitoff((scroff + fi.foff): i64); + emitline("(BP)\n"); + } else { + let sop: str = fieldstoreop(c, fi); + emitline("\t"); + emitline(sop); + emitline("\tAX, "); + emitoff((scroff + fi.foff): i64); + emitline("(BP)\n"); + }; + fi = nil; + }; + } else { + fi = fi.finext; + }; + }; + }; + fn_ = fn_.next; + }; + } else { + // N_IDENT: word-copy from rhs slot + // to scratch. Whole 8B words via + // MOVQ; tail via MOVL/MOVB so we + // read no further than the source + // slot's declared size. + let rl: *local = localfindnode(c, rhs.str); + if (rl != nil) { + let k: i32 = 0; + for (k + 8 <= rsz) { + emitline("\tMOVQ\t"); + emitoff((rl.off + k): i64); + emitline("(BP), AX\n"); + emitline("\tMOVQ\tAX, "); + emitoff((scroff + k): i64); + emitline("(BP)\n"); + k += 8; + }; + for (k + 4 <= rsz) { + emitline("\tMOVL\t"); + emitoff((rl.off + k): i64); + emitline("(BP), AX\n"); + emitline("\tMOVL\tAX, "); + emitoff((scroff + k): i64); + emitline("(BP)\n"); + k += 4; + }; + for (k < rsz) { + emitline("\tMOVB\t"); + emitoff((rl.off + k): i64); + emitline("(BP), AX\n"); + emitline("\tMOVB\tAX, "); + emitoff((scroff + k): i64); + emitline("(BP)\n"); + k += 1; + }; + }; + }; + emitline("\tMOVQ\t"); + emitoff(scroff: i64); + emitline("(BP), AX\n"); + emitline("\tMOVQ\t"); + emitoff((scroff + 8): i64); + emitline("(BP), DX\n"); + emitline("\tMOVQ\t"); + emitoff((scroff + 16): i64); + emitline("(BP), CX\n"); + emitline("\tMOVQ\tBP, SP\n"); + emitline("\tPOPQ\tBP\n"); + emitline("\tRET\n"); + c.lastwasreturn = 1; + return; + }; + }; + }; + }; cgexpr(c, rhs); } else { // Bare `return;` from a tagged-union-returning fn is @@ -14844,6 +14998,40 @@ fn scanlocals(c: *cgen, n: *node) i32 = { }; }; }; + // Whole-struct return for sizes <= 24B uses @retscr — when + // the function's return type is a registered TY_STRUCT of + // size <= 24 and the return rhs is N_IDENT or N_STRUCTLIT, + // cgreturn materialises in @retscr then loads AX/DX/CX. + // Mirrors cstage cgen.c which allocates the scratch slot + // inline; here we must pre-reserve so the prologue SUBQ + // reserves enough frame. + if (n.kind == nkind.N_RETURN) { + if (c.fnret != nil) { + if (c.fnret.kind == nkind.N_TNAME) { + let rname: str = c.fnret.str; + let rsi: *structinfo = structlookup(c, rname); + if (rsi != nil) { + if (rsi.totsize <= 24) { + let rhs: *node = n.lhs; + let okrhs: bool = false; + if (rhs != nil) { + if (rhs.kind == nkind.N_IDENT) { + okrhs = true; + }; + if (rhs.kind == nkind.N_STRUCTLIT) { + okrhs = true; + }; + }; + if (okrhs) { + if (!scanseenmark(c, "@retscr")) { + total += 24; + }; + }; + }; + }; + }; + }; + }; // Call-site struct-payload widening uses @tagscr — when the // arg is a struct literal/ident and the callee's param is // tagged, pushargsrev materialises in scratch and pushes. diff --git a/selfhost/cmd/wcc/cgendecl.ww b/selfhost/cmd/wcc/cgendecl.ww index 38f996f0..65e78486 100644 --- a/selfhost/cmd/wcc/cgendecl.ww +++ b/selfhost/cmd/wcc/cgendecl.ww @@ -302,6 +302,40 @@ fn scanlocals(c: *cgen, n: *node) i32 = { }; }; }; + // Whole-struct return for sizes <= 24B uses @retscr — when + // the function's return type is a registered TY_STRUCT of + // size <= 24 and the return rhs is N_IDENT or N_STRUCTLIT, + // cgreturn materialises in @retscr then loads AX/DX/CX. + // Mirrors cstage cgen.c which allocates the scratch slot + // inline; here we must pre-reserve so the prologue SUBQ + // reserves enough frame. + if (n.kind == nkind.N_RETURN) { + if (c.fnret != nil) { + if (c.fnret.kind == nkind.N_TNAME) { + let rname: str = c.fnret.str; + let rsi: *structinfo = structlookup(c, rname); + if (rsi != nil) { + if (rsi.totsize <= 24) { + let rhs: *node = n.lhs; + let okrhs: bool = false; + if (rhs != nil) { + if (rhs.kind == nkind.N_IDENT) { + okrhs = true; + }; + if (rhs.kind == nkind.N_STRUCTLIT) { + okrhs = true; + }; + }; + if (okrhs) { + if (!scanseenmark(c, "@retscr")) { + total += 24; + }; + }; + }; + }; + }; + }; + }; // Call-site struct-payload widening uses @tagscr — when the // arg is a struct literal/ident and the callee's param is // tagged, pushargsrev materialises in scratch and pushes. diff --git a/selfhost/cmd/wcc/cgenstmt.ww b/selfhost/cmd/wcc/cgenstmt.ww index dc5d56c0..3ea5017f 100644 --- a/selfhost/cmd/wcc/cgenstmt.ww +++ b/selfhost/cmd/wcc/cgenstmt.ww @@ -253,6 +253,146 @@ fn cgreturn(c: *cgen, n: *node) void = { c.lastwasreturn = 1; return; }; + // Whole-struct return for sizes <= 24B. ABI: AX=bytes[0..7], + // DX=bytes[8..15], CX=bytes[16..23]. Mirrors cstage cgen.c + // N_RETURN TY_STRUCT branch. Two rhs shapes are wired: + // N_IDENT (word-copy from rhs local slot) and N_STRUCTLIT + // (field-by-field store at scratch+foff, with tagged fields + // delegated to cgwidentaggedstore). Call-result chain return + // is deferred to #5's receive side. Sizes > 24B fall through + // to the scalar path below (only AX gets the first qword), + // pending sret. + let rname: str; + rname.ptr = nil; rname.len = 0; + if (c.fnret != nil) { + if (c.fnret.kind == nkind.N_TNAME) { + rname = c.fnret.str; + }; + }; + if (rname.len > 0) { + let rsi: *structinfo = structlookup(c, rname); + if (rsi != nil) { + let rsz: i32 = rsi.totsize; + if (rsz <= 24) { + let okrhs: bool = false; + if (rhs.kind == nkind.N_IDENT) { + okrhs = true; + }; + if (rhs.kind == nkind.N_STRUCTLIT) { + okrhs = true; + }; + if (okrhs) { + let scroff: i32 = localadd(c, + "@retscr", 24, nil); + emitline("\tXORQ\tAX, AX\n"); + emitline("\tMOVQ\tAX, "); + emitoff(scroff: i64); + emitline("(BP)\n"); + emitline("\tMOVQ\tAX, "); + emitoff((scroff + 8): i64); + emitline("(BP)\n"); + emitline("\tMOVQ\tAX, "); + emitoff((scroff + 16): i64); + emitline("(BP)\n"); + if (rhs.kind == nkind.N_STRUCTLIT) { + let fn_: *node = rhs.list; + for (fn_ != nil) { + if (fn_.kind == nkind.N_FIELD) { + let fi: *fieldinfo = rsi.fields; + for (fi != nil) { + if (streq(fi.fname, fn_.str)) { + if (istaggedtype(c, fi.tnode)) { + cgwidentaggedstore(c, + fi.tnode, fn_.lhs, + "BP", + scroff + fi.foff, + fi.fsz); + fi = nil; + } else { + cgexpr(c, fn_.lhs); + if (isfloattype(c, fi.tnode)) { + let mov: str = "MOVSD"; + if (isf32type(c, fi.tnode)) { + mov = "MOVSS"; + }; + emitline("\t"); + emitline(mov); + emitline("\tX0, "); + emitoff((scroff + fi.foff): i64); + emitline("(BP)\n"); + } else { + let sop: str = fieldstoreop(c, fi); + emitline("\t"); + emitline(sop); + emitline("\tAX, "); + emitoff((scroff + fi.foff): i64); + emitline("(BP)\n"); + }; + fi = nil; + }; + } else { + fi = fi.finext; + }; + }; + }; + fn_ = fn_.next; + }; + } else { + // N_IDENT: word-copy from rhs slot + // to scratch. Whole 8B words via + // MOVQ; tail via MOVL/MOVB so we + // read no further than the source + // slot's declared size. + let rl: *local = localfindnode(c, rhs.str); + if (rl != nil) { + let k: i32 = 0; + for (k + 8 <= rsz) { + emitline("\tMOVQ\t"); + emitoff((rl.off + k): i64); + emitline("(BP), AX\n"); + emitline("\tMOVQ\tAX, "); + emitoff((scroff + k): i64); + emitline("(BP)\n"); + k += 8; + }; + for (k + 4 <= rsz) { + emitline("\tMOVL\t"); + emitoff((rl.off + k): i64); + emitline("(BP), AX\n"); + emitline("\tMOVL\tAX, "); + emitoff((scroff + k): i64); + emitline("(BP)\n"); + k += 4; + }; + for (k < rsz) { + emitline("\tMOVB\t"); + emitoff((rl.off + k): i64); + emitline("(BP), AX\n"); + emitline("\tMOVB\tAX, "); + emitoff((scroff + k): i64); + emitline("(BP)\n"); + k += 1; + }; + }; + }; + emitline("\tMOVQ\t"); + emitoff(scroff: i64); + emitline("(BP), AX\n"); + emitline("\tMOVQ\t"); + emitoff((scroff + 8): i64); + emitline("(BP), DX\n"); + emitline("\tMOVQ\t"); + emitoff((scroff + 16): i64); + emitline("(BP), CX\n"); + emitline("\tMOVQ\tBP, SP\n"); + emitline("\tPOPQ\tBP\n"); + emitline("\tRET\n"); + c.lastwasreturn = 1; + return; + }; + }; + }; + }; cgexpr(c, rhs); } else { // Bare `return;` from a tagged-union-returning fn is diff --git a/selfhost/cmd/wwdump/main.combined.ww b/selfhost/cmd/wwdump/main.combined.ww index 6d00f404..34b57dbb 100644 --- a/selfhost/cmd/wwdump/main.combined.ww +++ b/selfhost/cmd/wwdump/main.combined.ww @@ -4830,6 +4830,20 @@ fn declmod(file: *node, d: *node) str = { // installdecl — install the top-level decl's name into the top scope. // We don't compute its type yet (that's the resolve pass) — just bind // the name so forward references resolve. +// +// Architectural note: wwstage uses COEXISTENCE rather than the cstage +// promote-SK_USE-in-place approach in cmd/wcc/check.c. SK_USE and any +// same-leaf SK_TYPE/SK_FN/SK_DEF/SK_VAR live as separate entries in +// the same scope-bucket, distinguished by `sym.mod`. The dot-prefix +// lookup in resolvewalk + scopelookupinmodule's mod-filter already +// disambiguate `fnmatch.flag` against an `fn fnmatch(...)` of the same +// leaf — no `use_alias` flag needed. So the cstage L1722-class bug +// (promotion missing use_alias) is structurally non-reachable here. +// Don't port the use_alias flag from cstage without first re-reading +// the architecture: adding a field to `sym` changes its size and risks +// the wwstage cgen amalloc-undersize trap (rob-pike). #11 (wwstage +// checkfile pass) will reconsider this when wwstage grows a real check +// pass on the cgen path. fn installdecl(c: *checker, file: *node, d: *node) void = { if (d == nil) { return; }; let k: nkind = d.kind; @@ -13671,6 +13685,146 @@ fn cgreturn(c: *cgen, n: *node) void = { c.lastwasreturn = 1; return; }; + // Whole-struct return for sizes <= 24B. ABI: AX=bytes[0..7], + // DX=bytes[8..15], CX=bytes[16..23]. Mirrors cstage cgen.c + // N_RETURN TY_STRUCT branch. Two rhs shapes are wired: + // N_IDENT (word-copy from rhs local slot) and N_STRUCTLIT + // (field-by-field store at scratch+foff, with tagged fields + // delegated to cgwidentaggedstore). Call-result chain return + // is deferred to #5's receive side. Sizes > 24B fall through + // to the scalar path below (only AX gets the first qword), + // pending sret. + let rname: str; + rname.ptr = nil; rname.len = 0; + if (c.fnret != nil) { + if (c.fnret.kind == nkind.N_TNAME) { + rname = c.fnret.str; + }; + }; + if (rname.len > 0) { + let rsi: *structinfo = structlookup(c, rname); + if (rsi != nil) { + let rsz: i32 = rsi.totsize; + if (rsz <= 24) { + let okrhs: bool = false; + if (rhs.kind == nkind.N_IDENT) { + okrhs = true; + }; + if (rhs.kind == nkind.N_STRUCTLIT) { + okrhs = true; + }; + if (okrhs) { + let scroff: i32 = localadd(c, + "@retscr", 24, nil); + emitline("\tXORQ\tAX, AX\n"); + emitline("\tMOVQ\tAX, "); + emitoff(scroff: i64); + emitline("(BP)\n"); + emitline("\tMOVQ\tAX, "); + emitoff((scroff + 8): i64); + emitline("(BP)\n"); + emitline("\tMOVQ\tAX, "); + emitoff((scroff + 16): i64); + emitline("(BP)\n"); + if (rhs.kind == nkind.N_STRUCTLIT) { + let fn_: *node = rhs.list; + for (fn_ != nil) { + if (fn_.kind == nkind.N_FIELD) { + let fi: *fieldinfo = rsi.fields; + for (fi != nil) { + if (streq(fi.fname, fn_.str)) { + if (istaggedtype(c, fi.tnode)) { + cgwidentaggedstore(c, + fi.tnode, fn_.lhs, + "BP", + scroff + fi.foff, + fi.fsz); + fi = nil; + } else { + cgexpr(c, fn_.lhs); + if (isfloattype(c, fi.tnode)) { + let mov: str = "MOVSD"; + if (isf32type(c, fi.tnode)) { + mov = "MOVSS"; + }; + emitline("\t"); + emitline(mov); + emitline("\tX0, "); + emitoff((scroff + fi.foff): i64); + emitline("(BP)\n"); + } else { + let sop: str = fieldstoreop(c, fi); + emitline("\t"); + emitline(sop); + emitline("\tAX, "); + emitoff((scroff + fi.foff): i64); + emitline("(BP)\n"); + }; + fi = nil; + }; + } else { + fi = fi.finext; + }; + }; + }; + fn_ = fn_.next; + }; + } else { + // N_IDENT: word-copy from rhs slot + // to scratch. Whole 8B words via + // MOVQ; tail via MOVL/MOVB so we + // read no further than the source + // slot's declared size. + let rl: *local = localfindnode(c, rhs.str); + if (rl != nil) { + let k: i32 = 0; + for (k + 8 <= rsz) { + emitline("\tMOVQ\t"); + emitoff((rl.off + k): i64); + emitline("(BP), AX\n"); + emitline("\tMOVQ\tAX, "); + emitoff((scroff + k): i64); + emitline("(BP)\n"); + k += 8; + }; + for (k + 4 <= rsz) { + emitline("\tMOVL\t"); + emitoff((rl.off + k): i64); + emitline("(BP), AX\n"); + emitline("\tMOVL\tAX, "); + emitoff((scroff + k): i64); + emitline("(BP)\n"); + k += 4; + }; + for (k < rsz) { + emitline("\tMOVB\t"); + emitoff((rl.off + k): i64); + emitline("(BP), AX\n"); + emitline("\tMOVB\tAX, "); + emitoff((scroff + k): i64); + emitline("(BP)\n"); + k += 1; + }; + }; + }; + emitline("\tMOVQ\t"); + emitoff(scroff: i64); + emitline("(BP), AX\n"); + emitline("\tMOVQ\t"); + emitoff((scroff + 8): i64); + emitline("(BP), DX\n"); + emitline("\tMOVQ\t"); + emitoff((scroff + 16): i64); + emitline("(BP), CX\n"); + emitline("\tMOVQ\tBP, SP\n"); + emitline("\tPOPQ\tBP\n"); + emitline("\tRET\n"); + c.lastwasreturn = 1; + return; + }; + }; + }; + }; cgexpr(c, rhs); } else { // Bare `return;` from a tagged-union-returning fn is @@ -14844,6 +14998,40 @@ fn scanlocals(c: *cgen, n: *node) i32 = { }; }; }; + // Whole-struct return for sizes <= 24B uses @retscr — when + // the function's return type is a registered TY_STRUCT of + // size <= 24 and the return rhs is N_IDENT or N_STRUCTLIT, + // cgreturn materialises in @retscr then loads AX/DX/CX. + // Mirrors cstage cgen.c which allocates the scratch slot + // inline; here we must pre-reserve so the prologue SUBQ + // reserves enough frame. + if (n.kind == nkind.N_RETURN) { + if (c.fnret != nil) { + if (c.fnret.kind == nkind.N_TNAME) { + let rname: str = c.fnret.str; + let rsi: *structinfo = structlookup(c, rname); + if (rsi != nil) { + if (rsi.totsize <= 24) { + let rhs: *node = n.lhs; + let okrhs: bool = false; + if (rhs != nil) { + if (rhs.kind == nkind.N_IDENT) { + okrhs = true; + }; + if (rhs.kind == nkind.N_STRUCTLIT) { + okrhs = true; + }; + }; + if (okrhs) { + if (!scanseenmark(c, "@retscr")) { + total += 24; + }; + }; + }; + }; + }; + }; + }; // Call-site struct-payload widening uses @tagscr — when the // arg is a struct literal/ident and the callee's param is // tagged, pushargsrev materialises in scratch and pushes. diff --git a/test/wcc/698_cgreturn_struct.c b/test/wcc/698_cgreturn_struct.c new file mode 100644 index 00000000..b7a66ba2 --- /dev/null +++ b/test/wcc/698_cgreturn_struct.c @@ -0,0 +1,256 @@ +/* + * 698_cgreturn_struct — whole-struct return ABI for sizes <= 24B. + * + * Pre-#7: `return s;` from a struct-returning fn fell through to the + * scalar path: only the first 8 bytes of the struct made it to AX, + * the rest was silently dropped. Compounded with the receive side + * (#5 N_ASSIGN whole-STRUCT rhs) being unwired, struct returns were + * a no-op end-to-end. + * + * #7 wires the producer side: cgreturn now materialises the struct + * into a zero-padded 24B scratch slot (`@retscr`), then loads + * AX/DX/CX from the slot unconditionally — three MOVQs regardless of + * declared size — so receiver code (landing in #5) can read all + * three words and mask by the declared struct size. R8 stays + * reserved for the tagged-return 4th word; sret for sizes > 24B is + * a separate future task. + * + * What this test pins: + * - cstage and wwstage emit byte-identical asm for every fixture + * (the bootstrap byte-identity invariant — if either stage's + * scanlocals / cgreturn drifts, the diff catches it). + * - Each fixture compiles+links+runs without crashing under both + * drivers (proves the prologue SUBQ reserves enough frame for + * the @retscr scratch; an under-booked frame would smash the + * saved BP / return address on the load-back). + * - End-to-end value verification (caller reads AX/DX/CX into a + * dst slot) is deferred to #5's test surface, since that's the + * receive side. Until then the call's result is discarded and + * main returns a literal exit code; we're checking the cgreturn + * side doesn't crash or produce invalid asm. + * + * Coverage: five struct shapes — 8B one-field, 16B two-i64, 24B + * three-i64 (the headline ABI shape), mixed-alignment i32+i32+i64+i64 + * (totsize 24 with the i32-pair packed), and N_IDENT rhs (let-init + * then `return p;`) vs N_STRUCTLIT rhs (`return T{...};`). The + * 25B+ sret case is explicitly OUT OF SCOPE — falls through to the + * existing scalar path (only AX gets the first qword); not pinned + * here. + */ +#include +#include +#include +#include +#include +#include + +static int +runwait(const char *cmd) +{ + int rc = system(cmd); + if (rc == -1) return -1; + if (WIFEXITED(rc)) return WEXITSTATUS(rc); + return -1; +} + +struct row { const char *label; const char *src; int want; }; + +static const struct row rows[] = { + /* 8B single-i64 field: smallest struct return. Exercises the + * sz=8 path where only AX is meaningful (DX/CX zero-padded). */ + { "one_i64_lit", + "type one = struct { v: i64 };\n" + "fn mk() one = { return one { v = 42i64 }; };\n" + "fn main() i32 = { mk(); return 0; };\n", + 0 }, + /* 16B two-i64 (the SysV 16B aggregate shape, but routed through + * our 3-reg path uniformly). N_STRUCTLIT rhs. */ + { "pair_i64_lit", + "type pair = struct { a: i64, b: i64 };\n" + "fn mk() pair = { return pair { a = 1i64, b = 2i64 }; };\n" + "fn main() i32 = { mk(); return 0; };\n", + 0 }, + /* 24B three-i64 — the headline shape: AX/DX/CX each carry one + * word, no zero pad needed in scratch. */ + { "trip_i64_lit", + "type trip = struct { x: i64, y: i64, z: i64 };\n" + "fn mk() trip = { return trip { x = 7i64, y = 11i64, z = 13i64 }; };\n" + "fn main() i32 = { mk(); return 0; };\n", + 0 }, + /* Mixed i32+i32+i64+i64: registerstruct packs two i32s into + * one quadword (a@0, b@4, c@8, d@16), totsize 24 after tail + * pad. Exercises the MOVL store-op branch in the structlit + * field walker. */ + { "mix_i32_i32_i64_i64_lit", + "type mix = struct { a: i32, b: i32, c: i64, d: i64 };\n" + "fn mk() mix = { return mix { a = 3, b = 5, c = 11i64, d = 12i64 }; };\n" + "fn main() i32 = { mk(); return 0; };\n", + 0 }, + /* N_IDENT rhs: let-init the struct then return it. Exercises + * the word-copy-from-slot branch (vs the structlit branch + * above). The let-init zero-fills the slot, so the trailing + * partial-word handlers (MOVL/MOVB) stay dormant — but the + * sz=24 path covers all three MOVQ words. */ + { "trip_i64_ident", + "type trip = struct { x: i64, y: i64, z: i64 };\n" + "fn mk() trip = {\n" + " let p: trip = trip { x = 100i64, y = 200i64, z = 300i64 };\n" + " return p;\n" + "};\n" + "fn main() i32 = { mk(); return 0; };\n", + 0 }, +}; + +static int +run_driver(const char *driver, const struct row *r, int i) +{ + char src[64], tmpdir[64], cmd[1024]; + snprintf(src, sizeof src, "/tmp/wcrs_%d_%d.ww", getpid(), i); + snprintf(tmpdir, sizeof tmpdir, "/tmp/wcrs_%d_d_%d", getpid(), i); + + FILE *f = fopen(src, "wb"); + if (!f) return -1; + fputs(r->src, f); + fclose(f); + + mkdir(tmpdir, 0755); + snprintf(cmd, sizeof cmd, "cd %s && %s build %s", + tmpdir, driver, src); + if (runwait(cmd) != 0) { + fprintf(stderr, "row[%s]: build via %s failed\n", + r->label, driver); + unlink(src); rmdir(tmpdir); + return -1; + } + + const char *base = strrchr(src, '/'); + base = base ? base + 1 : src; + char outbin[128]; + snprintf(outbin, sizeof outbin, "%s/%s", tmpdir, base); + char *dot = strrchr(outbin, '.'); + if (dot && strcmp(dot, ".ww") == 0) *dot = '\0'; + int got = runwait(outbin); + + unlink(src); unlink(outbin); rmdir(tmpdir); + return got; +} + +/* asm_byte_identical — generate .s via cstage's w6c and wwstage's w6c_ww + * and diff. Catches scanlocals / cgreturn drift between the two stages, + * which the bootstrap byte-identity (995_self_rebuild) covers globally + * but doesn't surface as a focused-fixture failure. */ +static int +asm_byte_identical(const char *bin, const struct row *r, int i) +{ + char src[64], cs[64], ws[64], cmd[1024]; + snprintf(src, sizeof src, "/tmp/wcrs_asm_%d_%d.ww", getpid(), i); + snprintf(cs, sizeof cs, "/tmp/wcrs_asm_%d_%d_c.s", getpid(), i); + snprintf(ws, sizeof ws, "/tmp/wcrs_asm_%d_%d_w.s", getpid(), i); + + FILE *f = fopen(src, "wb"); + if (!f) return -1; + fputs(r->src, f); + fclose(f); + + snprintf(cmd, sizeof cmd, "%s/w6c -o %s %s 2>/dev/null", bin, cs, src); + if (runwait(cmd) != 0) { + fprintf(stderr, "row[%s]: w6c errored\n", r->label); + unlink(src); + return -1; + } + snprintf(cmd, sizeof cmd, "%s/w6c_ww -o %s %s 2>/dev/null", + bin, ws, src); + if (runwait(cmd) != 0) { + fprintf(stderr, "row[%s]: w6c_ww errored\n", r->label); + unlink(src); unlink(cs); + return -1; + } + + FILE *fc = fopen(cs, "rb"); + FILE *fw = fopen(ws, "rb"); + int rc = 0; + if (!fc || !fw) { + rc = -1; + } else { + for (;;) { + int a = fgetc(fc); + int b = fgetc(fw); + if (a != b) { rc = -1; break; } + if (a == EOF) break; + } + } + if (fc) fclose(fc); + if (fw) fclose(fw); + if (rc != 0) + fprintf(stderr, "row[%s]: cstage vs wwstage asm differs\n", + r->label); + unlink(src); unlink(cs); unlink(ws); + return rc; +} + +int +main(void) +{ + const char *bin = getenv("BIN"); + if (!bin) bin = "out/bin"; + char absbin[1024]; + if (bin[0] != '/') { + char cwd[1024]; + if (getcwd(cwd, sizeof cwd) == NULL) return 1; + snprintf(absbin, sizeof absbin, "%s/%s", cwd, bin); + bin = absbin; + } + + char cdrv[1024]; + snprintf(cdrv, sizeof cdrv, "%s/ww", bin); + char wdrv[1024]; + snprintf(wdrv, sizeof wdrv, "%s/ww_ww", bin); + + struct { const char *name; const char *path; int gated_on_existence; } + drivers[] = { + { "cstage", cdrv, 0 }, + { "wwstage", wdrv, 1 }, + { NULL, NULL, 0 }, + }; + + int n = (int)(sizeof rows / sizeof rows[0]); + int total = 0, fail = 0; + + /* Compile+run for each (driver, row). */ + for (int d = 0; drivers[d].name; d++) { + if (drivers[d].gated_on_existence + && access(drivers[d].path, X_OK) != 0) { + fprintf(stderr, "cgreturn_struct: skip %s (no %s)\n", + drivers[d].name, drivers[d].path); + continue; + } + for (int i = 0; i < n; i++) { + int got = run_driver(drivers[d].path, &rows[i], i); + total++; + if (got != rows[i].want) { + fprintf(stderr, + "cgreturn_struct[%s][%s]: exit=%d want=%d\n", + drivers[d].name, rows[i].label, + got, rows[i].want); + fail++; + } + } + } + + /* Asm byte-identity diff, only when both stages exist. */ + if (access(wdrv, X_OK) == 0) { + for (int i = 0; i < n; i++) { + total++; + if (asm_byte_identical(bin, &rows[i], i) != 0) + fail++; + } + } + + if (fail) { + fprintf(stderr, + "cgreturn_struct: %d/%d fixtures failed\n", fail, total); + return 1; + } + printf("cgreturn_struct: %d/%d ok\n", total, total); + return 0; +}