wcc: cstage array-init dispatches MOVW for esz==2 (#128a)
cstage cgen.c array-literal init dispatch now uses MOVW for esz==2 (u16/i16 element width). Was deferred (cgen.c:7194-7198 explicit TODO: "Add MOVW to w6a if real i16 arrays land") until A_MOVW landed in both stages' w6a; that prereq is now met. Fixes silent partial-init clobber where MOVQ writes 8B over a 2B slot, overwriting neighbouring elements/locals. Wwstage was already correct (selfhost/cmd/wcc/cgenutil.ww:872-877 emits MOVW for sz==2 in tnodestoreop) — cstage aligns UP to wwstage's correctness here, a rule-10 inversion from the usual align-richer-DOWN. Test 914 (4 rows: u16 full-init, u16 small-values, u8 control, i16 signed) catches the bug via the rule-10 cs==ww byte-id gate. Runtime is not a reliable lever — ww rejects truly-partial inits, and fully-init [N]u16 accident-corrects via MOVQ-overlap (each write rewrote the prior write's trailing 6B). Reviewer non-vacuity: stash the fix → 3/4 rows fail on byte-id, restore → 4/4 green. Bootstrap NEUTRAL: 990-997 byte-id + combined_ww_fresh green; zero pre-existing partial-init narrow-element callers in lib/+selfhost/. strconv stof_data tables emit DATAW (raw bytes) and bypass this path, which is why fold-2 landed clean despite the bug. Sibling bugs filed for backlog (reviewer-128a flag-don't-bundle per rule-11): #141 (cgen.c:4894-4898 variadic-gather array-store has the same dispatch gap) and #142 (wwstage cgenstmt.ww:976-990 primsize(elemn.str) returns 0 for TY_NAMED alias names → wrong- stride store on [N]alias-of-u16; cstage already TY_NAMED-peeled).
This commit is contained in:
6
Makefile
6
Makefile
@@ -336,6 +336,7 @@ TESTS = $(BIN)/test_smoke $(BIN)/test_lex $(BIN)/test_parse $(BIN)/test_check \
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$(BIN)/test_continue_run \
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$(BIN)/test_sar_shr_run \
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$(BIN)/test_def_mangle_run \
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$(BIN)/test_arr_u16_store_run \
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$(BIN)/test_f64cgen_run \
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$(BIN)/test_f64crossmod_run \
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$(BIN)/test_tuprecv_run \
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@@ -1129,6 +1130,11 @@ $(BIN)/test_def_mangle_run: test/wcc/913_def_mangle_run.c $(BIN)/ww \
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$(LIB)/libwwrt.a | $(BIN)
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$(CC) $(CFLAGS) -o $@ $<
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$(BIN)/test_arr_u16_store_run: test/wcc/914_arr_u16_store_run.c $(BIN)/ww \
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$(BIN)/w6c $(BIN)/w6c_ww $(BIN)/w6a $(BIN)/w6l \
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$(LIB)/libwwrt.a | $(BIN)
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$(CC) $(CFLAGS) -o $@ $<
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$(BIN)/test_f64cgen_run: test/wcc/951_f64cgen_run.c $(BIN)/ww $(BIN)/w6c \
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$(BIN)/w6a $(BIN)/w6l $(LIB)/libwwrt.a | $(BIN)
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$(CC) $(CFLAGS) -o $@ $<
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@@ -7190,12 +7190,14 @@ cgstmt(Cg *c, Node *n, Local **locals, int *frame)
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int op = A_MOVQ;
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if (!is_str_el) {
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if (esz == 1) op = A_MOVB;
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else if (esz == 2) op = A_MOVW;
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else if (esz == 4) op = A_MOVL;
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/* esz == 2 (i16/u16) falls through to MOVQ —
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* over-writes by 6B; the next element store
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* rewrites the high half. For the last element
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* this trails 6 bytes into the next stack slot.
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* Add MOVW to w6a if real i16 arrays land. */
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/* #128a: esz==2 routes to MOVW (A_MOVW landed in
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* both stages' w6a). Pre-fix the 2-byte case fell
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* through to MOVQ, over-writing 6B into the next
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* element's slot; sequential adjacent writes
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* accident-corrected fully-init arrays but
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* partial inits clobbered neighbours. */
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}
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int idx = 0;
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Node *last = NULL;
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221
test/wcc/914_arr_u16_store_run.c
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221
test/wcc/914_arr_u16_store_run.c
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@@ -0,0 +1,221 @@
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/*
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* 914_arr_u16_store_run — runtime + byte-id net for #128a: array-
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* literal init into [N]u16 (or any [N]T where esz==2) must store with
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* MOVW, not MOVQ. Pre-fix cstage's cgen.c:7180-7222 array-init dispatch
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* routed esz==2 to MOVQ fall-through (the comment at 7194-7198
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* documented + deferred this until A_MOVW landed in w6a); the MOVQ
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* wrote 8 bytes into a 2-byte slot, overlapping the next 6 bytes of
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* stack. Adjacent fully-init writes accident-corrected via overlap
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* (each MOVQ rewrote the prior MOVQ's trailing 6B), but a PARTIAL
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* init left high garbage in slots that should have been default-zero.
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*
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* Fix is the now-unblocked dispatch: `else if (esz == 2) op = A_MOVW;`
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* The wwstage emitter was already correct (uses MOVW); the cstage gap
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* was the deferred TODO. Both stages now emit byte-identical MOVW for
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* [N]u16 (and any aliased-narrow-element [N]T whose tinfo.size == 2).
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*
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* Rows cover (the bug is caught via the rule-10 cs==ww byte-id gate;
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* ww doesn't accept truly-partial init literals, and adjacent MOVQ
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* writes accident-correct the runtime values, so byte-id is the lever):
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* - u16_full_init: fully-init [4]u16, regression guard (pre-fix
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* accident-correct at runtime via MOVQ overlap; .s shifts
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* MOVQ→MOVW, cs==ww BYTE-IDENTICAL now)
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* - u16_small_values: small u16 values, summed (regression guard)
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* - u8_control: [4]u8 baseline (already MOVB pre-fix, no shift)
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* - i16_signed: signed-narrow [N]i16, same dispatch — verifies the
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* fix isn't gated on unsignedness
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*
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* TY_NAMED alias of u16 (`type myw = u16; let a: [4]myw = …`) is a
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* sibling miscompile filed separately: wwstage's array-init element-
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* size dispatch reads `primsize(elemn.str)` which returns 0 for an
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* alias name, leaving esz at 8 (wrong slot, wrong stride). Out of
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* scope for #128a (cstage MOVW landing).
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*
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* Each row carries (a) cstage `ww build` + run asserting the exit
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* code and (b) w6c vs w6c_ww `.s` cmp (rule-10 byte-id). Post-#128a
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* the partial-init row's cstage emission gains MOVW; both stages
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* unchanged everywhere else.
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*/
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include <unistd.h>
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#include <sys/stat.h>
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#include <sys/wait.h>
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static int
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runwait(const char *cmd)
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{
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int rc = system(cmd);
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if (rc == -1) return -1;
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if (WIFEXITED(rc)) return WEXITSTATUS(rc);
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return -1;
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}
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struct row { const char *label; const char *src; int want_exit; };
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static const struct row rows[] = {
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/* Fully-init [4]u16: pre-fix MOVQ overlap accident-corrected;
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* post-fix proper MOVW per slot. Sum of last bytes = 0xBE = 190;
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* mod 256 = 190. We assert per-element to catch any value drift. */
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{ "u16_full_init",
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"package main;\n"
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"export fn main() i32 = {\n"
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" let a: [4]u16 = [0xABCDu16, 0xBEEFu16, 0xC0DEu16, 0xDEADu16];\n"
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" if (a[0] != 0xABCDu16) { return 1; };\n"
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" if (a[1] != 0xBEEFu16) { return 2; };\n"
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" if (a[2] != 0xC0DEu16) { return 3; };\n"
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" if (a[3] != 0xDEADu16) { return 4; };\n"
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" return 0;\n"
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"};\n", 0 },
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/* Same shape with smaller values — pin that the dispatch fires
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* on values that don't need the upper 16 bits. */
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{ "u16_small_values",
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"package main;\n"
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"export fn main() i32 = {\n"
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" let a: [4]u16 = [10u16, 20u16, 30u16, 40u16];\n"
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" let s: i32 = 0;\n"
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" s += a[0]: i32; s += a[1]: i32;\n"
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" s += a[2]: i32; s += a[3]: i32;\n"
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" return s;\n"
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"};\n", 100 },
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/* [4]u8 control: already correct (MOVB pre-fix). Regression
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* guard — asm should be unchanged. */
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{ "u8_control",
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"package main;\n"
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"export fn main() i32 = {\n"
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" let a: [4]u8 = [10u8, 20u8, 30u8, 40u8];\n"
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" let s: i32 = 0;\n"
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" s += a[0]: i32; s += a[1]: i32;\n"
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" s += a[2]: i32; s += a[3]: i32;\n"
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" return s;\n"
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"};\n", 100 },
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/* [4]i16: signed-narrow, same MOVW dispatch (op chosen by esz,
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* not signedness). Verifies the fix isn't gated. */
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{ "i16_signed",
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"package main;\n"
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"export fn main() i32 = {\n"
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" let a: [4]i16 = [10i16, 20i16, 30i16, -5i16];\n"
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" let s: i32 = 0;\n"
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" s += a[0]: i32; s += a[1]: i32;\n"
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" s += a[2]: i32; s += a[3]: i32;\n"
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" return s;\n"
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"};\n", 55 /* 10+20+30+(-5) = 55 */ },
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{ NULL, NULL, 0 }
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};
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static int
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slurp_eq(const char *a, const char *b)
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{
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FILE *fa = fopen(a, "rb");
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FILE *fb = fopen(b, "rb");
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if (!fa || !fb) { if (fa) fclose(fa); if (fb) fclose(fb); return -1; }
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int rc = 0;
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for (;;) {
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int ca = fgetc(fa);
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int cb = fgetc(fb);
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if (ca != cb) { rc = -1; break; }
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if (ca == EOF) break;
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}
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fclose(fa); fclose(fb);
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return rc;
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}
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int
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main(void)
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{
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const char *bin = getenv("BIN");
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if (!bin) bin = "out/bin";
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char absbin[1024];
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if (bin[0] != '/') {
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char cwd[1024];
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if (getcwd(cwd, sizeof cwd) == NULL) return 1;
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snprintf(absbin, sizeof absbin, "%s/%s", cwd, bin);
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bin = absbin;
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}
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char w6c[1100], w6c_ww[1100];
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snprintf(w6c, sizeof w6c, "%s/w6c", bin);
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snprintf(w6c_ww, sizeof w6c_ww, "%s/w6c_ww", bin);
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if (access(w6c_ww, X_OK) != 0) {
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fprintf(stderr, "arru16store: w6c_ww missing — cannot run "
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"the cs==ww byte-id gate (the whole point of this test)\n");
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return 1;
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}
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int n = 0, fail = 0;
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for (int i = 0; rows[i].src; i++, n++) {
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char src[64];
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snprintf(src, sizeof src, "/tmp/wwau16_%d_%d.ww", getpid(), i);
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FILE *f = fopen(src, "wb");
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if (f == NULL) { fail++; continue; }
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fputs(rows[i].src, f);
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fclose(f);
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char tmpdir[64];
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snprintf(tmpdir, sizeof tmpdir, "/tmp/wwau16_%d_d_%d",
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getpid(), i);
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mkdir(tmpdir, 0755);
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char cmd[2048];
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snprintf(cmd, sizeof cmd, "cd %s && %s/ww build %s",
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tmpdir, bin, src);
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if (runwait(cmd) != 0) {
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fprintf(stderr, "row[%s]: cstage build failed\n",
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rows[i].label);
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fail++;
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unlink(src); rmdir(tmpdir);
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continue;
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}
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char outbin[128];
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const char *base = strrchr(src, '/');
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base = base ? base + 1 : src;
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snprintf(outbin, sizeof outbin, "%s/%s", tmpdir, base);
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char *dot = strrchr(outbin, '.');
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if (dot && strcmp(dot, ".ww") == 0) *dot = '\0';
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int got = runwait(outbin);
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if (got != rows[i].want_exit) {
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fprintf(stderr, "row[%s]: cstage exit %d, want %d\n",
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rows[i].label, got, rows[i].want_exit);
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fail++;
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}
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unlink(outbin); rmdir(tmpdir);
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char cs_s[64], ws_s[64];
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snprintf(cs_s, sizeof cs_s, "/tmp/wwau16_%d_%d_cs.s",
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getpid(), i);
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snprintf(ws_s, sizeof ws_s, "/tmp/wwau16_%d_%d_ww.s",
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getpid(), i);
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snprintf(cmd, sizeof cmd, "%s -o %s %s 2>/dev/null",
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w6c, cs_s, src);
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if (runwait(cmd) != 0) {
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fprintf(stderr, "row[%s]: w6c failed\n", rows[i].label);
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fail++; unlink(src); continue;
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}
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snprintf(cmd, sizeof cmd, "%s -o %s %s 2>/dev/null",
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w6c_ww, ws_s, src);
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if (runwait(cmd) != 0) {
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fprintf(stderr, "row[%s]: w6c_ww failed\n",
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rows[i].label);
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fail++; unlink(src); unlink(cs_s); continue;
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}
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if (slurp_eq(cs_s, ws_s) != 0) {
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fprintf(stderr,
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"row[%s]: cstage/wwstage .s DIFFER (rule-10 "
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"byte-id violation)\n", rows[i].label);
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fail++;
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}
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unlink(src); unlink(cs_s); unlink(ws_s);
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}
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if (fail) {
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fprintf(stderr, "%d/%d arr-u16-store tests failed\n", fail, n);
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return 1;
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}
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printf("arru16store: %d/%d ok (cstage run + cs==ww byte-id)\n",
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n, n);
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return 0;
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}
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