wcc: tagged float-variant return packs float bits via X0-spill (#157)
The N_RETURN tagged-pack scalar-variant arm did MOVQ AX,DX, but a float variant's value is in X0 not AX -> packed stale int (broke stof64/stof32 return (f64|invalid|overflow)). Fix: float variant bridges X0->DX via a stack slot (SUBQ $8,SP; MOVQ $0,(SP); MOVSS|MOVSD X0,(SP); MOVQ (SP),DX; ADDQ $8,SP), gated type_isfloat/exprfloatkind. No MOVQ-xmm->gp form exists, hence the spill (715-class, cgreturn-register-pack twin of 715's store-to-slot). Zero-slot-first -> deterministic f32 high-4. AX-independent -> also resolves the multi-variant cs!=ww. Bootstrap-NEUTRAL (compiler has no float-tagged-return). Test 707 +3 rows (f64/f32/multi, slot+8 bit-exact; f32 no-f32-arg to isolate #143). Make test 184/184 incl 990-997 byte-id.
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@@ -7716,6 +7716,35 @@ cgstmt(Cg *c, Node *n, Local **locals, int *frame)
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areg(D_CX));
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ins2(c, A_MOVQ, areg(D_AX),
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areg(D_DX));
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} else if (type_isfloat(vt)) {
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/* #157: float variant. cgexpr left
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* the value in X0, not AX; there is
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* no MOVQ-xmm->gp encoding, so bridge
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* X0->DX through a stack slot (same
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* SUBQ/MOVSD/ADDQ idiom as the arg-
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* push at cgen.c:5367). Zero the slot
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* first so the f32 case (MOVSS writes
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* only the low 4 bytes) leaves a
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* deterministic high-4 — cs==ww byte-
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* id, matching f64's MOVSD which fills
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* all 8. The AX-independent spill also
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* removes the stale-AX cs!=ww on
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* multi-variant returns. */
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int isf32 = type_isf32(vt);
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ins2(c, A_SUBQ, aimm(8), areg(D_SP));
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ins2(c, A_MOVQ, aimm(0),
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amem(D_SP, 0));
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ins2(c, isf32 ? A_MOVSS : A_MOVSD,
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areg(D_X0), amem(D_SP, 0));
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ins2(c, A_MOVQ, amem(D_SP, 0),
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areg(D_DX));
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ins2(c, A_ADDQ, aimm(8), areg(D_SP));
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if (rsz > 16)
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ins2(c, A_MOVQ, aimm(0),
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areg(D_CX));
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if (rsz > 24)
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ins2(c, A_MOVQ, aimm(0),
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areg(D_R8));
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} else {
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ins2(c, A_MOVQ, areg(D_AX),
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areg(D_DX));
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@@ -22060,6 +22060,31 @@ fn cgreturn(c: *cgen, n: *node) void = {
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emitline("\tMOVQ\tCX, R8\n");
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emitline("\tMOVQ\tBX, CX\n");
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emitline("\tMOVQ\tAX, DX\n");
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} else { if (exprfloatkind(c, rhs) != 0) {
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// #157: float variant — cgexpr left the value
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// in X0, not AX. No MOVQ-xmm->gp encoding, so
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// bridge X0->DX through a stack slot (same arg-
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// push idiom). Zero the slot first so the f32
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// case (MOVSS writes only the low 4 bytes)
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// leaves a deterministic high-4 — cs==ww byte-
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// id, matching f64's MOVSD which fills all 8.
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// The AX-independent spill also removes the
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// stale-AX cs!=ww on multi-variant returns.
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emitline("\tSUBQ\t$8, SP\n");
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emitline("\tMOVQ\t$0, (SP)\n");
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let mov: str = "MOVSD";
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if (exprfloatkind(c, rhs) == 1) { mov = "MOVSS"; };
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emitline("\t");
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emitline(mov);
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emitline("\tX0, (SP)\n");
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emitline("\tMOVQ\t(SP), DX\n");
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emitline("\tADDQ\t$8, SP\n");
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if (rsz > 16) {
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emitline("\tMOVQ\t$0, CX\n");
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};
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if (rsz > 24) {
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emitline("\tMOVQ\t$0, R8\n");
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};
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} else {
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emitline("\tMOVQ\tAX, DX\n");
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// scalar fills DX only. Zero CX / R8 if dst
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@@ -22070,7 +22095,7 @@ fn cgreturn(c: *cgen, n: *node) void = {
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if (rsz > 24) {
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emitline("\tMOVQ\t$0, R8\n");
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};
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};};
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};};};
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emitline("\tMOVQ\t$");
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if (idx < 0) { idx = 0; };
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emitint(idx: i64);
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@@ -422,6 +422,31 @@ fn cgreturn(c: *cgen, n: *node) void = {
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emitline("\tMOVQ\tCX, R8\n");
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emitline("\tMOVQ\tBX, CX\n");
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emitline("\tMOVQ\tAX, DX\n");
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} else { if (exprfloatkind(c, rhs) != 0) {
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// #157: float variant — cgexpr left the value
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// in X0, not AX. No MOVQ-xmm->gp encoding, so
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// bridge X0->DX through a stack slot (same arg-
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// push idiom). Zero the slot first so the f32
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// case (MOVSS writes only the low 4 bytes)
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// leaves a deterministic high-4 — cs==ww byte-
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// id, matching f64's MOVSD which fills all 8.
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// The AX-independent spill also removes the
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// stale-AX cs!=ww on multi-variant returns.
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emitline("\tSUBQ\t$8, SP\n");
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emitline("\tMOVQ\t$0, (SP)\n");
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let mov: str = "MOVSD";
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if (exprfloatkind(c, rhs) == 1) { mov = "MOVSS"; };
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emitline("\t");
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emitline(mov);
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emitline("\tX0, (SP)\n");
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emitline("\tMOVQ\t(SP), DX\n");
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emitline("\tADDQ\t$8, SP\n");
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if (rsz > 16) {
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emitline("\tMOVQ\t$0, CX\n");
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};
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if (rsz > 24) {
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emitline("\tMOVQ\t$0, R8\n");
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};
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} else {
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emitline("\tMOVQ\tAX, DX\n");
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// scalar fills DX only. Zero CX / R8 if dst
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@@ -432,7 +457,7 @@ fn cgreturn(c: *cgen, n: *node) void = {
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if (rsz > 24) {
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emitline("\tMOVQ\t$0, R8\n");
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};
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};};
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};};};
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emitline("\tMOVQ\t$");
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if (idx < 0) { idx = 0; };
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emitint(idx: i64);
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@@ -22060,6 +22060,31 @@ fn cgreturn(c: *cgen, n: *node) void = {
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emitline("\tMOVQ\tCX, R8\n");
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emitline("\tMOVQ\tBX, CX\n");
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emitline("\tMOVQ\tAX, DX\n");
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} else { if (exprfloatkind(c, rhs) != 0) {
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// #157: float variant — cgexpr left the value
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// in X0, not AX. No MOVQ-xmm->gp encoding, so
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// bridge X0->DX through a stack slot (same arg-
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// push idiom). Zero the slot first so the f32
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// case (MOVSS writes only the low 4 bytes)
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// leaves a deterministic high-4 — cs==ww byte-
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// id, matching f64's MOVSD which fills all 8.
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// The AX-independent spill also removes the
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// stale-AX cs!=ww on multi-variant returns.
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emitline("\tSUBQ\t$8, SP\n");
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emitline("\tMOVQ\t$0, (SP)\n");
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let mov: str = "MOVSD";
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if (exprfloatkind(c, rhs) == 1) { mov = "MOVSS"; };
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emitline("\t");
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emitline(mov);
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emitline("\tX0, (SP)\n");
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emitline("\tMOVQ\t(SP), DX\n");
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emitline("\tADDQ\t$8, SP\n");
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if (rsz > 16) {
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emitline("\tMOVQ\t$0, CX\n");
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};
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if (rsz > 24) {
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emitline("\tMOVQ\t$0, R8\n");
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};
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} else {
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emitline("\tMOVQ\tAX, DX\n");
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// scalar fills DX only. Zero CX / R8 if dst
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@@ -22070,7 +22095,7 @@ fn cgreturn(c: *cgen, n: *node) void = {
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if (rsz > 24) {
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emitline("\tMOVQ\t$0, R8\n");
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};
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};};
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};};};
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emitline("\tMOVQ\t$");
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if (idx < 0) { idx = 0; };
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emitint(idx: i64);
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@@ -1,7 +1,10 @@
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/*
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* 707_cgreturn_variant_zero — tagged-return ABI variant-widen zero-pad
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* for unused AX/DX/CX/R8 words (task #18) plus aliased-tagged variant-
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* index lookup (task #20).
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* index lookup (task #20) plus float-variant payload-from-X0 pack
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* (#157, rows 10-12): the same scalar-variant arm packed stale AX into
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* the payload word for an f64/f32 value (which lives in X0), not the
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* float bits — fixed by an X0->stack->DX spill bridge.
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*
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* Pre-fix (#18): cgreturn's `!istagged && !isstruct` variant-widen arm
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* only filled the registers a given variant actually uses (scalar → DX;
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@@ -247,6 +250,53 @@ static const struct row rows[] = {
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" return (*pt): i32;\n"
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"};\n",
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2 },
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/* 10-12: #157 — float variant of the same `!istagged && !isstruct`
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* return arm. Pre-fix it did `MOVQ AX, DX` even when the value was
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* a float in X0 (no MOVQ-xmm->gp form), so the payload word held
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* stale AX, not the float bits. Fix spills X0 through a stack slot
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* (zero-slot-first so the f32 MOVSS low-4 write leaves a determin-
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* istic high-4). Probe slot+8 as the float directly (bit-exact
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* f64/f32 equality) — isolates the return-pack from the match-
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* receive. The f32 row avoids f32 ARGS (pre-existing #143 f32-arg
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* MOVSD/MOVSS divergence is unrelated; f32 here comes from a global
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* with an int arg, so the byte-id check pins THIS fix). */
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{ "f64_variant_return_payload",
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"type ft = (f64 | i32);\n"
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"fn addf(a: f64, b: f64) ft = { return a + b; };\n"
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"fn main() i32 = {\n"
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" let a: ft = addf(1.5, 2.0);\n"
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" let p: u64 = (&a): u64;\n"
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" let pf: *f64 = (p + 8u64): *f64;\n"
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" let fv: f64 = *pf;\n"
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" if (fv == 3.5) { return 1; };\n"
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" return 0;\n"
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"};\n",
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1 },
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{ "f32_variant_return_payload",
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"let g: f32 = 1.5f32;\n"
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"type ft = (f32 | i32);\n"
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"fn mkf(k: i32) ft = { if (k > 0) { return g + 2.0f32; }; return k; };\n"
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"fn main() i32 = {\n"
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" let a: ft = mkf(1);\n"
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" let p: u64 = (&a): u64;\n"
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" let pf: *f32 = (p + 8u64): *f32;\n"
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" let fv: f32 = *pf;\n"
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" if (fv == 3.5f32) { return 1; };\n"
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" return 0;\n"
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"};\n",
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1 },
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{ "f64_variant_return_multivariant",
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"type ft = (f64 | i32 | bool);\n"
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"fn mulf(a: f64, b: f64) ft = { return a * b; };\n"
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"fn main() i32 = {\n"
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" let a: ft = mulf(2.5, 4.0);\n"
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" let p: u64 = (&a): u64;\n"
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" let pf: *f64 = (p + 8u64): *f64;\n"
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" let fv: f64 = *pf;\n"
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" if (fv == 10.0) { return 1; };\n"
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" return 0;\n"
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"};\n",
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1 },
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};
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static int
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