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w6c+selfhost: cgen N_CAST signed narrow + peel !T on unsigned narrow

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TY_RUNE excluded — wwstage primsize skips it; task #5 will collapse
both gates back to symmetric once type_isunsigned recurses TY_ENUM.
This commit is contained in:
Hojun-Cho
2026-05-13 20:06:24 +09:00
parent 777c951fab
commit 388ab8a707
14 changed files with 421 additions and 32 deletions
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7
Makefile
View File

@@ -216,6 +216,7 @@ TESTS = $(BIN)/test_smoke $(BIN)/test_lex $(BIN)/test_parse $(BIN)/test_check \
$(BIN)/test_arch \
$(BIN)/test_e2e $(BIN)/test_ffi $(BIN)/test_dyn $(BIN)/test_stdlib \
$(BIN)/test_at_test $(BIN)/test_let_global \
$(BIN)/test_int_cast_signed \
$(BIN)/test_selfhost $(BIN)/test_w6a_ww $(BIN)/test_w6l_ww \
$(BIN)/test_w6c_ww $(BIN)/test_ww_ww $(BIN)/test_self_rebuild \
$(BIN)/test_dyn_ww $(BIN)/test_selfcheck $(BIN)/test_at_test_ww
@@ -276,6 +277,12 @@ $(BIN)/test_let_global: test/wcc/630_let_global.c $(BIN)/ww $(BIN)/w6c \
$(BIN)/w6a $(BIN)/w6l $(LIB)/libwwrt.a | $(BIN)
$(CC) $(CFLAGS) -o $@ $<
$(BIN)/test_int_cast_signed: test/wcc/640_int_cast_signed.c $(BIN)/ww \
$(BIN)/w6c $(BIN)/w6a $(BIN)/w6l \
$(BIN)/ww_ww $(BIN)/w6c_ww $(BIN)/w6a_ww $(BIN)/w6l_ww \
$(LIB)/libwwrt.a | $(BIN)
$(CC) $(CFLAGS) -o $@ $<
$(BIN)/test_selfhost: test/wcc/990_selfhost.c $(BIN)/w6c $(BIN)/w6a $(BIN)/w6l \
$(BIN)/ww $(BIN)/wwdump $(BIN)/wwdump_ww $(LIB)/libwwrt.a | $(BIN)
$(CC) $(CFLAGS) -o $@ $<

34
cmd/w6a/asm.c
View File

@@ -499,11 +499,39 @@ a_encode(Asm *a)
a_emit_byte(a, 0xBF);
emit_modrm_mem(a, rcode(p->to.type),
p->from.reg, p->from.offset);
} else if (p->from.type >= D_AX && p->from.type <= D_R15
&& p->to.type >= D_AX && p->to.type <= D_R15) {
emit_rex(a, rhi(p->to.type), rhi(p->from.type), 1);
a_emit_byte(a, 0x0F);
a_emit_byte(a, 0xBF);
a_emit_byte(a, modrm(3,
rcode(p->to.type), rcode(p->from.type)));
} else {
fprintf(stderr, "w6a: line %d: unsupported MOVSWQ shape\n", p->line);
a->errs++;
}
break;
case A_MOVSBQ:
/* MOVSX r64, r/m8 — 0F BE /r with REX.W */
if (p->from.type == D_INDIR
&& p->to.type >= D_AX && p->to.type <= D_R15) {
emit_rex(a, rhi(p->to.type), rhi(p->from.reg), 1);
a_emit_byte(a, 0x0F);
a_emit_byte(a, 0xBE);
emit_modrm_mem(a, rcode(p->to.type),
p->from.reg, p->from.offset);
} else if (p->from.type >= D_AX && p->from.type <= D_R15
&& p->to.type >= D_AX && p->to.type <= D_R15) {
emit_rex(a, rhi(p->to.type), rhi(p->from.type), 1);
a_emit_byte(a, 0x0F);
a_emit_byte(a, 0xBE);
a_emit_byte(a, modrm(3,
rcode(p->to.type), rcode(p->from.type)));
} else {
fprintf(stderr, "w6a: line %d: unsupported MOVSBQ shape\n", p->line);
a->errs++;
}
break;
case A_MOVB:
/* MOV r/m8, r8 — 88 /r. No REX.W. We always emit REX
* to allow access to SIL/DIL/BPL/SPL. */
@@ -574,6 +602,12 @@ a_encode(Asm *a)
a_emit_byte(a, 0x63);
emit_modrm_mem(a, rcode(p->to.type),
p->from.reg, p->from.offset);
} else if (p->from.type >= D_AX && p->from.type <= D_R15
&& p->to.type >= D_AX && p->to.type <= D_R15) {
emit_rex(a, rhi(p->to.type), rhi(p->from.type), 1);
a_emit_byte(a, 0x63);
a_emit_byte(a, modrm(3,
rcode(p->to.type), rcode(p->from.type)));
} else {
fprintf(stderr, "w6a: line %d: unsupported MOVSXD shape\n", p->line);
a->errs++;

1
cmd/w6a/parse.c
View File

@@ -86,6 +86,7 @@ opcode_lookup(const char *m)
{ "MOVW", A_MOVW }, { "MOVB", A_MOVB },
{ "MOVZBQ", A_MOVZBQ }, { "MOVZWQ", A_MOVZWQ },
{ "MOVSXD", A_MOVSXD }, { "MOVSWQ", A_MOVSWQ },
{ "MOVSBQ", A_MOVSBQ },
{ "MOVSD", A_MOVSD },
{ "ADDSD", A_ADDSD },{ "SUBSD", A_SUBSD },
{ "MULSD", A_MULSD },{ "DIVSD", A_DIVSD },

9
cmd/w6c/6.out.h
View File

@@ -51,10 +51,11 @@ enum {
A_MOVL,
A_MOVW,
A_MOVB,
A_MOVZBQ, /* movzx r64, r/m8 — load byte zero-extended */
A_MOVZWQ, /* movzx r64, r/m16 — load word zero-extended */
A_MOVSXD, /* movsxd r64, r/m32 — load i32 sign-extended */
A_MOVSWQ, /* movsx r64, r/m16 — load word sign-extended */
A_MOVZBQ, /* movzx r64, r/m8 — byte zero-extended */
A_MOVZWQ, /* movzx r64, r/m16 — word zero-extended */
A_MOVSXD, /* movsxd r64, r/m32 — i32 sign-extended */
A_MOVSWQ, /* movsx r64, r/m16 — i16 sign-extended */
A_MOVSBQ, /* movsx r64, r/m8 — i8 sign-extended */
/* SSE2 scalar double-precision float */
A_MOVSD, /* xmm/m → xmm and xmm → m */

25
cmd/w6c/cgen.c
View File

@@ -3490,13 +3490,15 @@ cgexpr(Cg *c, Node *n, Local *locals)
* width (mod 2^n). Without this, `(big_u64): u32` left the
* upper 32 bits intact and CMPQ/DIVQ misread the value.
*
* Unsigned targets only here. Signed-narrow targets (i8/
* i16/i32) need MOVSBQ / MOVSWQ / MOVSXD in their reg-reg
* form which the assembler doesn't expose yet; callers
* that need a clean signed-narrow value either keep the
* value in range before the cast (as strconv does with
* an explicit bounds check) or AND the low bits manually.
* Tracking this gap is part of the same TODO. */
* Unsigned targets use MOVL/ANDQ to clear the high bits.
* Signed-narrow targets (i8/i16/i32) sign-extend via
* MOVSBQ/MOVSWQ/MOVSXD reg-reg so the sign bit propagates;
* this is what lets `(0xFF80i64): i8` compare equal to
* -128i64 after a widening read-back. Gated on the literal
* TY_I8/TY_I16/TY_I32 kinds so the wwstage cgen path
* (cgcast in cgenexpr.ww, which keys off primsize on the
* type-name node) emits the same instructions for the same
* inputs — that byte-identity gate is what test 993 pins. */
if (!from_f && !to_f && n->type) {
Type *tt = n->type;
Type *tu = (tt && tt->kind == TY_NAMED) ? tt->under : tt;
@@ -3509,6 +3511,15 @@ cgexpr(Cg *c, Node *n, Local *locals)
ins2(c, A_ANDQ, aimm((i64)mask),
areg(D_AX));
}
} else if (tu && (tu->kind == TY_I8
|| tu->kind == TY_I16 || tu->kind == TY_I32)) {
/* Literal-kind gate excludes TY_RUNE on purpose:
* runes are unsigned Unicode scalars, owed to the
* MOVL path once task #5 lands. */
int op = A_MOVSXD;
if (tu->kind == TY_I8) op = A_MOVSBQ;
else if (tu->kind == TY_I16) op = A_MOVSWQ;
ins2(c, op, areg(D_AX), areg(D_AX));
}
/* TY_BOOL is size 1 too; clamp to a single byte so
* `(u32_val): bool` produces 0 or a low-byte value

1
cmd/w6c/txt.c
View File

@@ -37,6 +37,7 @@ anames(int op)
case A_MOVZWQ: return "MOVZWQ";
case A_MOVSXD: return "MOVSXD";
case A_MOVSWQ: return "MOVSWQ";
case A_MOVSBQ: return "MOVSBQ";
case A_MOVSD: return "MOVSD";
case A_ADDSD: return "ADDSD";
case A_SUBSD: return "SUBSD";

36
selfhost/cmd/w6a/asm.ww
View File

@@ -494,11 +494,41 @@ export fn encode(a: *asm_) i32 = {
emitmodrmmem(a, rcode(tt), p.from.reg, p.from.offset);
p = p.link; continue;
};};
if (isgpr(ft)) { if (isgpr(tt)) {
emitrex(a, rhi(tt), rhi(ft), 1);
emitbyte(a, 15u8);
emitbyte(a, 191u8); // 0xBF
emitbyte(a, modrmbyte(3, rcode(tt), rcode(ft)));
p = p.link; continue;
};};
os.write(2, "w6a: unsupported MOVSWQ shape\n".ptr, 29u64);
a.errs += 1;
p = p.link; continue;
};
if (op == A_MOVSBQ) {
// MOVSX r64, r/m8 — 0F BE /r with REX.W.
let ft: i32 = p.from.atype;
let tt: i32 = p.to.atype;
if (ft == D_INDIR) { if (isgpr(tt)) {
emitrex(a, rhi(tt), rhi(p.from.reg), 1);
emitbyte(a, 15u8);
emitbyte(a, 190u8); // 0xBE
emitmodrmmem(a, rcode(tt), p.from.reg, p.from.offset);
p = p.link; continue;
};};
if (isgpr(ft)) { if (isgpr(tt)) {
emitrex(a, rhi(tt), rhi(ft), 1);
emitbyte(a, 15u8);
emitbyte(a, 190u8); // 0xBE
emitbyte(a, modrmbyte(3, rcode(tt), rcode(ft)));
p = p.link; continue;
};};
os.write(2, "w6a: unsupported MOVSBQ shape\n".ptr, 29u64);
a.errs += 1;
p = p.link; continue;
};
if (op == A_MOVZBQ) {
let ft: i32 = p.from.atype;
let tt: i32 = p.to.atype;
@@ -549,6 +579,12 @@ export fn encode(a: *asm_) i32 = {
emitmodrmmem(a, rcode(tt), p.from.reg, p.from.offset);
p = p.link; continue;
};};
if (isgpr(ft)) { if (isgpr(tt)) {
emitrex(a, rhi(tt), rhi(ft), 1);
emitbyte(a, 99u8); // 0x63
emitbyte(a, modrmbyte(3, rcode(tt), rcode(ft)));
p = p.link; continue;
};};
os.write(2, "w6a: unsupported MOVSXD shape\n".ptr, 29u64);
a.errs += 1;
p = p.link; continue;

38
selfhost/cmd/w6a/main.combined.ww
View File

@@ -421,6 +421,7 @@ def A_MOVSXD: i32 = 9;
def A_MOVW: i32 = 62;
def A_MOVZWQ: i32 = 63;
def A_MOVSWQ: i32 = 64;
def A_MOVSBQ: i32 = 65;
def A_MOVSD: i32 = 10;
def A_ADDSD: i32 = 11;
@@ -673,6 +674,7 @@ fn opcodelookup(p: *u8, n: u64) i32 = {
if (streqlit(p, n, "MOVZWQ")) { return A_MOVZWQ; };
if (streqlit(p, n, "MOVSXD")) { return A_MOVSXD; };
if (streqlit(p, n, "MOVSWQ")) { return A_MOVSWQ; };
if (streqlit(p, n, "MOVSBQ")) { return A_MOVSBQ; };
if (streqlit(p, n, "MOVSD")) { return A_MOVSD; };
if (streqlit(p, n, "ADDSD")) { return A_ADDSD; };
if (streqlit(p, n, "SUBSD")) { return A_SUBSD; };
@@ -1720,11 +1722,41 @@ export fn encode(a: *asm_) i32 = {
emitmodrmmem(a, rcode(tt), p.from.reg, p.from.offset);
p = p.link; continue;
};};
if (isgpr(ft)) { if (isgpr(tt)) {
emitrex(a, rhi(tt), rhi(ft), 1);
emitbyte(a, 15u8);
emitbyte(a, 191u8); // 0xBF
emitbyte(a, modrmbyte(3, rcode(tt), rcode(ft)));
p = p.link; continue;
};};
os.write(2, "w6a: unsupported MOVSWQ shape\n".ptr, 29u64);
a.errs += 1;
p = p.link; continue;
};
if (op == A_MOVSBQ) {
// MOVSX r64, r/m8 — 0F BE /r with REX.W.
let ft: i32 = p.from.atype;
let tt: i32 = p.to.atype;
if (ft == D_INDIR) { if (isgpr(tt)) {
emitrex(a, rhi(tt), rhi(p.from.reg), 1);
emitbyte(a, 15u8);
emitbyte(a, 190u8); // 0xBE
emitmodrmmem(a, rcode(tt), p.from.reg, p.from.offset);
p = p.link; continue;
};};
if (isgpr(ft)) { if (isgpr(tt)) {
emitrex(a, rhi(tt), rhi(ft), 1);
emitbyte(a, 15u8);
emitbyte(a, 190u8); // 0xBE
emitbyte(a, modrmbyte(3, rcode(tt), rcode(ft)));
p = p.link; continue;
};};
os.write(2, "w6a: unsupported MOVSBQ shape\n".ptr, 29u64);
a.errs += 1;
p = p.link; continue;
};
if (op == A_MOVZBQ) {
let ft: i32 = p.from.atype;
let tt: i32 = p.to.atype;
@@ -1775,6 +1807,12 @@ export fn encode(a: *asm_) i32 = {
emitmodrmmem(a, rcode(tt), p.from.reg, p.from.offset);
p = p.link; continue;
};};
if (isgpr(ft)) { if (isgpr(tt)) {
emitrex(a, rhi(tt), rhi(ft), 1);
emitbyte(a, 99u8); // 0x63
emitbyte(a, modrmbyte(3, rcode(tt), rcode(ft)));
p = p.link; continue;
};};
os.write(2, "w6a: unsupported MOVSXD shape\n".ptr, 29u64);
a.errs += 1;
p = p.link; continue;

1
selfhost/cmd/w6a/parse.ww
View File

@@ -37,6 +37,7 @@ fn opcodelookup(p: *u8, n: u64) i32 = {
if (streqlit(p, n, "MOVZWQ")) { return A_MOVZWQ; };
if (streqlit(p, n, "MOVSXD")) { return A_MOVSXD; };
if (streqlit(p, n, "MOVSWQ")) { return A_MOVSWQ; };
if (streqlit(p, n, "MOVSBQ")) { return A_MOVSBQ; };
if (streqlit(p, n, "MOVSD")) { return A_MOVSD; };
if (streqlit(p, n, "ADDSD")) { return A_ADDSD; };
if (streqlit(p, n, "SUBSD")) { return A_SUBSD; };

1
selfhost/cmd/w6a/types.ww
View File

@@ -67,6 +67,7 @@ def A_MOVSXD: i32 = 9;
def A_MOVW: i32 = 62;
def A_MOVZWQ: i32 = 63;
def A_MOVSWQ: i32 = 64;
def A_MOVSBQ: i32 = 65;
def A_MOVSD: i32 = 10;
def A_ADDSD: i32 = 11;

24
selfhost/cmd/w6c/main.combined.ww
View File

@@ -8159,21 +8159,25 @@ fn cgcast(c: *cgen, n: *node) void = {
// int↔int casts narrow via an explicit clamp before the early
// return so `(big_u64): u32` doesn't leak the upper 32 bits.
// Hare semantics: `expr: T` truncates to T's bit width (mod 2^n).
// Mirrors cmd/w6c/cgen.c's N_CAST clamp; signed-narrow targets
// (i8/i16/i32) stay no-ops until the assembler grows MOVSBQ /
// MOVSWQ / MOVSXD reg-reg forms.
// Mirrors cmd/w6c/cgen.c's N_CAST clamp. Unsigned narrow clears
// the upper bits via MOVL/ANDQ; signed narrow sign-extends via
// MOVSBQ/MOVSWQ/MOVSXD reg-reg so the sign bit propagates.
if (srcfk == 0 && dstfk == 0) {
let tn: *node = n.rhs;
// Walk through alias chains (`type random = u64`).
// Walk through alias chains (`type random = u64`) and the
// `!T` error-flag wrapper (`type invalid = !i32`) — the
// bang is a tagged-union marker, not a representational
// change, so it must not block the narrow-cast clamp.
for (tn != nil) {
if (tn.kind != nkind.N_TNAME) { tn = nil; }
if (tn.kind == nkind.N_TBANG) { tn = tn.lhs; }
else { if (tn.kind != nkind.N_TNAME) { tn = nil; }
else {
let nm: str = tn.str;
if (primsize(nm) > 0) { break; };
let alias: *node = aliaslookup(c, nm);
if (alias == nil) { tn = nil; }
else { tn = alias; };
};
}; };
};
if (tn != nil) {
let nm: str = tn.str;
@@ -8193,7 +8197,13 @@ fn cgcast(c: *cgen, n: *node) void = {
};
} else { if (is_bool) {
emitline("\tANDQ\t$255, AX\n");
}; };
} else { if (streq(nm, "i8")) {
emitline("\tMOVSBQ\tAX, AX\n");
} else { if (streq(nm, "i16")) {
emitline("\tMOVSWQ\tAX, AX\n");
} else { if (streq(nm, "i32")) {
emitline("\tMOVSXD\tAX, AX\n");
}; }; }; }; };
}; };
};
return;

24
selfhost/cmd/wcc/cgenexpr.ww
View File

@@ -378,21 +378,25 @@ fn cgcast(c: *cgen, n: *node) void = {
// int↔int casts narrow via an explicit clamp before the early
// return so `(big_u64): u32` doesn't leak the upper 32 bits.
// Hare semantics: `expr: T` truncates to T's bit width (mod 2^n).
// Mirrors cmd/w6c/cgen.c's N_CAST clamp; signed-narrow targets
// (i8/i16/i32) stay no-ops until the assembler grows MOVSBQ /
// MOVSWQ / MOVSXD reg-reg forms.
// Mirrors cmd/w6c/cgen.c's N_CAST clamp. Unsigned narrow clears
// the upper bits via MOVL/ANDQ; signed narrow sign-extends via
// MOVSBQ/MOVSWQ/MOVSXD reg-reg so the sign bit propagates.
if (srcfk == 0 && dstfk == 0) {
let tn: *node = n.rhs;
// Walk through alias chains (`type random = u64`).
// Walk through alias chains (`type random = u64`) and the
// `!T` error-flag wrapper (`type invalid = !i32`) — the
// bang is a tagged-union marker, not a representational
// change, so it must not block the narrow-cast clamp.
for (tn != nil) {
if (tn.kind != nkind.N_TNAME) { tn = nil; }
if (tn.kind == nkind.N_TBANG) { tn = tn.lhs; }
else { if (tn.kind != nkind.N_TNAME) { tn = nil; }
else {
let nm: str = tn.str;
if (primsize(nm) > 0) { break; };
let alias: *node = aliaslookup(c, nm);
if (alias == nil) { tn = nil; }
else { tn = alias; };
};
}; };
};
if (tn != nil) {
let nm: str = tn.str;
@@ -412,7 +416,13 @@ fn cgcast(c: *cgen, n: *node) void = {
};
} else { if (is_bool) {
emitline("\tANDQ\t$255, AX\n");
}; };
} else { if (streq(nm, "i8")) {
emitline("\tMOVSBQ\tAX, AX\n");
} else { if (streq(nm, "i16")) {
emitline("\tMOVSWQ\tAX, AX\n");
} else { if (streq(nm, "i32")) {
emitline("\tMOVSXD\tAX, AX\n");
}; }; }; }; };
}; };
};
return;

24
selfhost/cmd/wwdump/main.combined.ww
View File

@@ -8159,21 +8159,25 @@ fn cgcast(c: *cgen, n: *node) void = {
// int↔int casts narrow via an explicit clamp before the early
// return so `(big_u64): u32` doesn't leak the upper 32 bits.
// Hare semantics: `expr: T` truncates to T's bit width (mod 2^n).
// Mirrors cmd/w6c/cgen.c's N_CAST clamp; signed-narrow targets
// (i8/i16/i32) stay no-ops until the assembler grows MOVSBQ /
// MOVSWQ / MOVSXD reg-reg forms.
// Mirrors cmd/w6c/cgen.c's N_CAST clamp. Unsigned narrow clears
// the upper bits via MOVL/ANDQ; signed narrow sign-extends via
// MOVSBQ/MOVSWQ/MOVSXD reg-reg so the sign bit propagates.
if (srcfk == 0 && dstfk == 0) {
let tn: *node = n.rhs;
// Walk through alias chains (`type random = u64`).
// Walk through alias chains (`type random = u64`) and the
// `!T` error-flag wrapper (`type invalid = !i32`) — the
// bang is a tagged-union marker, not a representational
// change, so it must not block the narrow-cast clamp.
for (tn != nil) {
if (tn.kind != nkind.N_TNAME) { tn = nil; }
if (tn.kind == nkind.N_TBANG) { tn = tn.lhs; }
else { if (tn.kind != nkind.N_TNAME) { tn = nil; }
else {
let nm: str = tn.str;
if (primsize(nm) > 0) { break; };
let alias: *node = aliaslookup(c, nm);
if (alias == nil) { tn = nil; }
else { tn = alias; };
};
}; };
};
if (tn != nil) {
let nm: str = tn.str;
@@ -8193,7 +8197,13 @@ fn cgcast(c: *cgen, n: *node) void = {
};
} else { if (is_bool) {
emitline("\tANDQ\t$255, AX\n");
}; };
} else { if (streq(nm, "i8")) {
emitline("\tMOVSBQ\tAX, AX\n");
} else { if (streq(nm, "i16")) {
emitline("\tMOVSWQ\tAX, AX\n");
} else { if (streq(nm, "i32")) {
emitline("\tMOVSXD\tAX, AX\n");
}; }; }; }; };
}; };
};
return;

228
test/wcc/640_int_cast_signed.c Normal file
View File

@@ -0,0 +1,228 @@
/*
* 640_int_cast_signed — signed narrow `(i64): i8|i16|i32` must
* sign-extend the narrowed value, not silently truncate. Each
* fixture casts a high-bit-set source to a narrow signed type,
* widens back to i64, and returns 42 on the expected match. A
* cast that fails to sign-extend leaks the low bits and the
* comparison falls through to the `0` arm.
*
* Exercises both stages via the user-facing `ww run` (cstage)
* and `ww_ww run` (wwstage) when present; the loop runs each
* driver in turn so a regression on either side is caught
* here without spawning extra targets.
*/
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <unistd.h>
#include <sys/stat.h>
#include <sys/wait.h>
static int
runwait(const char *cmd)
{
int rc = system(cmd);
if (rc == -1) return -1;
if (WIFEXITED(rc)) return WEXITSTATUS(rc);
return -1;
}
struct row { const char *label; const char *src; int want; };
static const struct row rows[] = {
/* i8 ← 0xFFFF_FF80: low byte is 0x80, expect -128 after
* narrow + widen-back round trip. */
{ "i8_high_bits_set",
"fn main() i32 = {\n"
" let x: i64 = 0xFFFFFF80i64;\n"
" let y: i8 = x: i8;\n"
" let z: i64 = y: i64;\n"
" if (z == -128i64) { return 42; };\n"
" return 0;\n"
"};\n",
42 },
/* i8 ← 0x80: bare low byte still encodes -128 once narrowed. */
{ "i8_low_byte_negative",
"fn main() i32 = {\n"
" let x: i64 = 0x80i64;\n"
" let y: i8 = x: i8;\n"
" let z: i64 = y: i64;\n"
" if (z == -128i64) { return 42; };\n"
" return 0;\n"
"};\n",
42 },
/* i8 ← 0x7F: positive, no sign-extend. */
{ "i8_positive_max",
"fn main() i32 = {\n"
" let x: i64 = 0x7Fi64;\n"
" let y: i8 = x: i8;\n"
" let z: i64 = y: i64;\n"
" if (z == 127i64) { return 42; };\n"
" return 0;\n"
"};\n",
42 },
/* i16 ← 0xFFFF_8000: low 16 bits encode -32768. */
{ "i16_high_bits_set",
"fn main() i32 = {\n"
" let x: i64 = 0xFFFF8000i64;\n"
" let y: i16 = x: i16;\n"
" let z: i64 = y: i64;\n"
" if (z == -32768i64) { return 42; };\n"
" return 0;\n"
"};\n",
42 },
/* i16 ← 0x8000: low half-word's sign bit alone. */
{ "i16_low_word_negative",
"fn main() i32 = {\n"
" let x: i64 = 0x8000i64;\n"
" let y: i16 = x: i16;\n"
" let z: i64 = y: i64;\n"
" if (z == -32768i64) { return 42; };\n"
" return 0;\n"
"};\n",
42 },
/* i32 ← 0xFFFFFFFF_80000000: low 32 bits encode INT32_MIN. */
{ "i32_high_bits_set",
"fn main() i32 = {\n"
" let x: i64 = -2147483648i64;\n"
" let y: i32 = x: i32;\n"
" let z: i64 = y: i64;\n"
" if (z == -2147483648i64) { return 42; };\n"
" return 0;\n"
"};\n",
42 },
/* i32 ← 0x0000_0000_8000_0000: low dword's sign bit alone. */
{ "i32_low_dword_negative",
"fn main() i32 = {\n"
" let x: i64 = 0x80000000i64;\n"
" let y: i32 = x: i32;\n"
" let z: i64 = y: i64;\n"
" if (z == -2147483648i64) { return 42; };\n"
" return 0;\n"
"};\n",
42 },
/* Compare against the narrow target's own range, not the
* widened slot — i32 - 1 must roll over to INT32_MAX after
* MOVSXD sign-extends the wrap-around value. */
{ "i32_wrap_negative_to_positive",
"fn main() i32 = {\n"
" let x: i64 = 0x80000000i64;\n"
" let y: i32 = (x - 1i64): i32;\n"
" let z: i64 = y: i64;\n"
" if (z == 2147483647i64) { return 42; };\n"
" return 0;\n"
"};\n",
42 },
/* `!T` error-flag wrapper must not block the narrow clamp.
* Pins the wwstage N_TBANG peel in cgcast: without it, the
* unsigned u8 mask was skipped and 0x1FF leaked through. */
{ "u8bang_unsigned_narrow",
"type u8x = !u8;\n"
"fn main() i32 = {\n"
" let y: u8x = 0x1FFu64: u8x;\n"
" let z: u64 = y: u64;\n"
" if (z == 0xFFu64) { return 42; };\n"
" return 0;\n"
"};\n",
42 },
/* Signed `!T` companion — sign-extend must fire through the
* bang wrapper so `(0xFF80): !i8 → i64` reads back -128. */
{ "i8bang_signed_narrow",
"type i8x = !i8;\n"
"fn main() i32 = {\n"
" let y: i8x = 0xFF80i64: i8x;\n"
" let z: i64 = y: i64;\n"
" if (z == -128i64) { return 42; };\n"
" return 0;\n"
"};\n",
42 },
};
static int
run_driver(const char *driver, const struct row *r, int i)
{
char src[64], tmpdir[64], cmd[1024];
snprintf(src, sizeof src, "/tmp/wwic_%d_%d.ww", getpid(), i);
snprintf(tmpdir, sizeof tmpdir, "/tmp/wwic_%d_d_%d", getpid(), i);
FILE *f = fopen(src, "wb");
if (!f) return -1;
fputs(r->src, f);
fclose(f);
mkdir(tmpdir, 0755);
snprintf(cmd, sizeof cmd, "cd %s && %s build %s",
tmpdir, driver, src);
if (runwait(cmd) != 0) {
fprintf(stderr, "row[%s]: build via %s failed\n",
r->label, driver);
unlink(src); rmdir(tmpdir);
return -1;
}
const char *base = strrchr(src, '/');
base = base ? base + 1 : src;
char outbin[128];
snprintf(outbin, sizeof outbin, "%s/%s", tmpdir, base);
char *dot = strrchr(outbin, '.');
if (dot && strcmp(dot, ".ww") == 0) *dot = '\0';
int got = runwait(outbin);
unlink(src); unlink(outbin); rmdir(tmpdir);
return got;
}
int
main(void)
{
const char *bin = getenv("BIN");
if (!bin) bin = "out/bin";
char absbin[1024];
if (bin[0] != '/') {
char cwd[1024];
if (getcwd(cwd, sizeof cwd) == NULL) return 1;
snprintf(absbin, sizeof absbin, "%s/%s", cwd, bin);
bin = absbin;
}
char cdrv[1024];
snprintf(cdrv, sizeof cdrv, "%s/ww", bin);
char wdrv[1024];
snprintf(wdrv, sizeof wdrv, "%s/ww_ww", bin);
struct { const char *name; const char *path; int gated_on_existence; }
drivers[] = {
{ "cstage", cdrv, 0 },
{ "wwstage", wdrv, 1 },
{ NULL, NULL, 0 },
};
int n = (int)(sizeof rows / sizeof rows[0]);
int total = 0, fail = 0;
for (int d = 0; drivers[d].name; d++) {
if (drivers[d].gated_on_existence
&& access(drivers[d].path, X_OK) != 0) {
fprintf(stderr, "int_cast_signed: skip %s (no %s)\n",
drivers[d].name, drivers[d].path);
continue;
}
for (int i = 0; i < n; i++) {
int got = run_driver(drivers[d].path, &rows[i], i);
total++;
if (got != rows[i].want) {
fprintf(stderr,
"int_cast_signed[%s][%s]: exit=%d want=%d\n",
drivers[d].name, rows[i].label,
got, rows[i].want);
fail++;
}
}
}
if (fail) {
fprintf(stderr,
"int_cast_signed: %d/%d fixtures failed\n", fail, total);
return 1;
}
printf("int_cast_signed: %d/%d ok\n", total, total);
return 0;
}