wcc: float array-element loads to X0 + indexed-float consumer (#119)

cgindex's element-load sites ended in the integer loadopsz (MOVQ/MOVL
into AX), with no float branch — so an f32/f64 array element landed in
a GPR while the consumer's ADDSD/MOVSD read a stale X0. Add a float-
element branch (MOVSS f32 / MOVSD f64 into X0) at all three wwstage
cgindex sites (global, baselocal, fallback) and both cstage N_INDEX
element-load sites, deriving float-ness from the SAME stamped element
tinfo the esz already reads: new elemisfloatc/elemisf32c helpers
(mirroring elemissignedc) for ident bases, typeisfloat/typeisf32(n.type_)
for N_DOT/N_INDEX bases — never a fresh node-stamp that could hit an
unstamped base (#121).

The load fix cannot land alone: the wwstage consumer (cgbin/cgcast)
classified an indexed float operand as INTEGER (no exprfloatkind N_INDEX
arm) and fell to PUSHQ/ADDQ/MOVSXD, while the cstage read the stamped
operand type and used ADDSD/CVTTSD2SI. That divergence is pre-existing
on master (proven: master cs vs ww already differ on `a[0]+a[1]`),
contradicting the original "consumer already expects X0, cs==ww"
premise; load-only would leave the wwstage incoherent (value in X0,
consumed from AX) and still cs!=ww. So this also adds the exprfloatkind
N_INDEX arm — safe because the index-result type_ IS checker-stamped
(cgindex reads it for esz), unlike the unstamped-N_MLET case deferred
under #121. With both, f64 arrays are runtime-correct and both stages
emit byte-identical asm.

946_floatarr_run: f64 element add / trunc / non-adjacent index assert
the value + cs==ww; the f32 row asserts cs==ww only — its runtime value
is blocked by a SEPARATE store-side bug (f32 array-element store writes
AX raw double low-bits instead of CVTSD2SS-narrowed X0), filed as
#119-store. Regen w6c/wwdump combined.ww (cgenexpr.ww + cgenutil.ww
embedded).

Makefile

@@ -328,6 +328,7 @@ TESTS	= $(BIN)/test_smoke $(BIN)/test_lex $(BIN)/test_parse $(BIN)/test_check \
 	  $(BIN)/test_crc32_run $(BIN)/test_crc64_run \
 	  $(BIN)/test_siphash_run \
 	  $(BIN)/test_checked_run \
+	  $(BIN)/test_floatarr_run \
 	  $(BIN)/test_f64cgen_run \
 	  $(BIN)/test_f64crossmod_run \
 	  $(BIN)/test_tuprecv_run \
@@ -1082,6 +1083,11 @@ $(BIN)/test_checked_run: test/wcc/969_checked_run.c $(BIN)/ww $(BIN)/w6c \
 		$(BIN)/w6a $(BIN)/w6l $(LIB)/libwwrt.a | $(BIN)
 	$(CC) $(CFLAGS) -o $@ $<
 
+$(BIN)/test_floatarr_run: test/wcc/946_floatarr_run.c $(BIN)/ww \
+		$(BIN)/w6c $(BIN)/w6c_ww $(BIN)/w6a $(BIN)/w6l \
+		$(LIB)/libwwrt.a | $(BIN)
+	$(CC) $(CFLAGS) -o $@ $<
+
 $(BIN)/test_f64cgen_run: test/wcc/951_f64cgen_run.c $(BIN)/ww $(BIN)/w6c \
 		$(BIN)/w6a $(BIN)/w6l $(LIB)/libwwrt.a | $(BIN)
 	$(CC) $(CFLAGS) -o $@ $<

cmd/w6c/cgen.c

@@ -6414,6 +6414,17 @@ cgexpr(Cg *c, Node *n, Local *locals)
 				ins2(c, A_MOVQ, amem(D_BX, 0), areg(D_AX));
 				break;
 			}
+			/* float element → MOVSS/MOVSD into X0: the consumer's
+			 * ADDSD/MOVSD spill machinery already expects X0, but the
+			 * integer fldloadop below would leave it in AX and the SSE
+			 * side reads stale (#119). Float-ness from esub — the same
+			 * type the esz above reads. Twin of the scalar-float global
+			 * load at cgen.c:2014. */
+			if (type_isfloat(esub)) {
+				int op = type_isf32(esub) ? A_MOVSS : A_MOVSD;
+				ins2(c, op, amem(D_BX, 0), areg(D_X0));
+				break;
+			}
 			int load_op = fldloadop(esub, esz);
 			ins2(c, load_op, amem(D_BX, 0), areg(D_AX));
 			break;
@@ -6456,6 +6467,13 @@ cgexpr(Cg *c, Node *n, Local *locals)
 			ins2(c, A_MOVQ, amem(D_BX, 0), areg(D_AX));
 			break;
 		}
+		/* float element via fallback base → X0 (see Site A, #119). The
+		 * base address is in AX; MOVSS/MOVSD reads the element into X0. */
+		if (type_isfloat(esub)) {
+			int op = type_isf32(esub) ? A_MOVSS : A_MOVSD;
+			ins2(c, op, amem(D_AX, 0), areg(D_X0));
+			break;
+		}
 		{
 			int load_op = fldloadop(esub, esz);
 			ins2(c, load_op, amem(D_AX, 0), areg(D_AX));

selfhost/cmd/w6c/main.combined.ww

@@ -11658,6 +11658,34 @@ fn elemissignedc(c: *cgen, t: *node) bool = {
 	return typeissigned(ti.sub);
 };
 
+// elemisfloatc — given an indexable type-AST (`*T`, `[]T`, `[N]T`), is
+// its element an f32/f64? Used by cgindex to route the element load to
+// MOVSS/MOVSD into X0 instead of the integer loadopsz into AX (#119 —
+// the array-element twin of the scalar-float global load at cgen.c:
+// 2014). Reads through the stamped tinfo, peeling TY_NAMED before the
+// .sub read exactly as elemissignedc does (#64/#65). Float-ness comes
+// from the SAME tinfo the esz already reads — never a fresh node-stamp
+// (the unstamped-base trap that broke the exprfloatkind collapse, #121).
+fn elemisfloatc(c: *cgen, t: *node) bool = {
+	if (t == nil) { return false; };
+	let ti: *tinfo = t.type_: *tinfo;
+	if (ti == nil) { return false; };
+	for (ti != nil && ti.kind == tykind.TY_NAMED) { ti = ti.under; };
+	if (ti == nil) { return false; };
+	return typeisfloat(ti.sub);
+};
+
+// elemisf32c — narrower elemisfloatc: true only when the element is f32,
+// so cgindex picks MOVSS over MOVSD at the #119 element load.
+fn elemisf32c(c: *cgen, t: *node) bool = {
+	if (t == nil) { return false; };
+	let ti: *tinfo = t.type_: *tinfo;
+	if (ti == nil) { return false; };
+	for (ti != nil && ti.kind == tykind.TY_NAMED) { ti = ti.under; };
+	if (ti == nil) { return false; };
+	return typeisf32(ti.sub);
+};
+
 // fieldissignedc — does this field/element type-AST need sign-
 // extension on a sub-word load? One-liner via typeissigned (cstage
 // cgen.c:240 `fld_issigned` SSoT). t.type_ is stamped at check.ww
@@ -12732,6 +12760,21 @@ export fn exprfloatkind(c: *cgen, n: *node) i32 = {
 		if (isfloattype(c, n.rhs)) { return 2; };
 		return 0;
 	};
+	if (k == nkind.N_INDEX) {
+		// #119: a float array/slice element feeds cgbin / cgcast through
+		// X0 (the #119 load is MOVSS/MOVSD into X0). Without this arm the
+		// wwstage consumer falls to integer (PUSHQ/ADDQ, MOVSXD) while
+		// the cstage reads the stamped operand type and uses ADDSD/
+		// CVTTSD2SI — a rule-10 divergence the #119 load fix exposes (the
+		// consumer was never aligned for indexed float operands). The
+		// index-result type_ IS checker-stamped (cgindex reads it for
+		// esz at the N_DOT/N_INDEX-base arms), so this is NOT the
+		// unstamped-N_MLET-base trap that deferred the broader collapse
+		// (#121) — only the always-stamped N_INDEX case is classified.
+		if (isf32type(c, n)) { return 1; };
+		if (isfloattype(c, n)) { return 2; };
+		return 0;
+	};
 	if (k == nkind.N_IDENT) {
 		let lc: *local = localfindnode(c, n.str);
 		if (lc != nil) {
@@ -14944,6 +14987,11 @@ fn cgindex(c: *cgen, n: *node) void = {
 	let idx: *node = n.rhs;
 	let esz: i32 = 8;
 	let signed_elem: bool = false;
+	// #119: float element loads route to MOVSS/MOVSD into X0, not the
+	// integer loadopsz into AX. float_elem/f32_elem are set per-branch
+	// from the SAME tinfo esz reads — never a fresh node-stamp (#121).
+	let float_elem: bool = false;
+	let f32_elem: bool = false;
 	// #1/Phase 3: str and slice are both 24B (and a >16B struct is
 	// 24B+ too), so the header branches below MUST gate on KIND
 	// (elemisstr/elemisslice, mirroring cstage's elem_is_str||
@@ -14969,6 +15017,8 @@ fn cgindex(c: *cgen, n: *node) void = {
 			if (baselocal != nil) {
 				esz = elemsizeofc(c, baselocal.tnode);
 				signed_elem = elemissignedc(c, baselocal.tnode);
+				float_elem = elemisfloatc(c, baselocal.tnode);
+				f32_elem = elemisf32c(c, baselocal.tnode);
 			} else {
 				let tn: *node = letvartnode(c, bn);
 				if (tn != nil) {
@@ -14977,12 +15027,16 @@ fn cgindex(c: *cgen, n: *node) void = {
 						globalname = bn;
 						esz = elemsizeofc(c, tn);
 						signed_elem = elemissignedc(c, tn);
+						float_elem = elemisfloatc(c, tn);
+						f32_elem = elemisf32c(c, tn);
 					};
 					if (tn.kind == nkind.N_TPTR) {
 						isglobalptr = true;
 						globalname = bn;
 						esz = elemsizeofc(c, tn);
 						signed_elem = elemissignedc(c, tn);
+						float_elem = elemisfloatc(c, tn);
+						f32_elem = elemisf32c(c, tn);
 					};
 				};
 			};
@@ -14994,7 +15048,7 @@ fn cgindex(c: *cgen, n: *node) void = {
 			// cgen.c:3517-18). esz-only — N_DOT-base signedness
 			// stays unset, as before.
 			let dt: *tinfo = n.type_: *tinfo;
-			if (dt != nil) { esz = dt.size: i32; elemisstr = typeisstr(dt); elemisslice = typeisslice(dt); };
+			if (dt != nil) { esz = dt.size: i32; elemisstr = typeisstr(dt); elemisslice = typeisslice(dt); float_elem = typeisfloat(dt); f32_elem = typeisf32(dt); };
 		} else { if (base.kind == nkind.N_INDEX) {
 			// #60: chained `names[i][k]` — n.type_ is the checker-
 			// stamped outer element tinfo (indexresult over the inner
@@ -15005,6 +15059,8 @@ fn cgindex(c: *cgen, n: *node) void = {
 			if (et != nil) {
 				esz = et.size: i32;
 				signed_elem = typeissigned(et);
+				float_elem = typeisfloat(et);
+				f32_elem = typeisf32(et);
 			};
 		};};};
 	};
@@ -15086,6 +15142,18 @@ fn cgindex(c: *cgen, n: *node) void = {
 			cgslicehdr(c, "BX");
 			return;
 		};
+		// #119: float element → MOVSS/MOVSD into X0 (the consumer's
+		// ADDSD/MOVSD spill machinery already expects X0); the integer
+		// loadopsz below would leave it in AX and the SSE side reads
+		// stale. Twin of cgen.c:2014's scalar-float global load.
+		if (float_elem) {
+			let fop1: str = "MOVSD";
+			if (f32_elem) { fop1 = "MOVSS"; };
+			emitline("\t");
+			emitline(fop1);
+			emitline("\t(BX), X0\n");
+			return;
+		};
 		let lop1: str = loadopsz(signed_elem, esz);
 		emitline("\t");
 		emitline(lop1);
@@ -15125,6 +15193,15 @@ fn cgindex(c: *cgen, n: *node) void = {
 			cgslicehdr(c, "BX");
 			return;
 		};
+		// #119: float element → X0 (see the global arm above).
+		if (float_elem) {
+			let fop2: str = "MOVSD";
+			if (f32_elem) { fop2 = "MOVSS"; };
+			emitline("\t");
+			emitline(fop2);
+			emitline("\t(BX), X0\n");
+			return;
+		};
 		let lop2: str = loadopsz(signed_elem, esz);
 		emitline("\t");
 		emitline(lop2);
@@ -15156,6 +15233,16 @@ fn cgindex(c: *cgen, n: *node) void = {
 		cgslicehdr(c, "AX");
 		return;
 	};
+	// #119: float element → X0 (see the global arm above). The base
+	// address is in AX; MOVSS/MOVSD reads the element into X0.
+	if (float_elem) {
+		let fop3: str = "MOVSD";
+		if (f32_elem) { fop3 = "MOVSS"; };
+		emitline("\t");
+		emitline(fop3);
+		emitline("\t(AX), X0\n");
+		return;
+	};
 	let lop3: str = loadopsz(signed_elem, esz);
 	emitline("\t");
 	emitline(lop3);

selfhost/cmd/wcc/cgenexpr.ww

@@ -749,6 +749,11 @@ fn cgindex(c: *cgen, n: *node) void = {
 	let idx: *node = n.rhs;
 	let esz: i32 = 8;
 	let signed_elem: bool = false;
+	// #119: float element loads route to MOVSS/MOVSD into X0, not the
+	// integer loadopsz into AX. float_elem/f32_elem are set per-branch
+	// from the SAME tinfo esz reads — never a fresh node-stamp (#121).
+	let float_elem: bool = false;
+	let f32_elem: bool = false;
 	// #1/Phase 3: str and slice are both 24B (and a >16B struct is
 	// 24B+ too), so the header branches below MUST gate on KIND
 	// (elemisstr/elemisslice, mirroring cstage's elem_is_str||
@@ -774,6 +779,8 @@ fn cgindex(c: *cgen, n: *node) void = {
 			if (baselocal != nil) {
 				esz = elemsizeofc(c, baselocal.tnode);
 				signed_elem = elemissignedc(c, baselocal.tnode);
+				float_elem = elemisfloatc(c, baselocal.tnode);
+				f32_elem = elemisf32c(c, baselocal.tnode);
 			} else {
 				let tn: *node = letvartnode(c, bn);
 				if (tn != nil) {
@@ -782,12 +789,16 @@ fn cgindex(c: *cgen, n: *node) void = {
 						globalname = bn;
 						esz = elemsizeofc(c, tn);
 						signed_elem = elemissignedc(c, tn);
+						float_elem = elemisfloatc(c, tn);
+						f32_elem = elemisf32c(c, tn);
 					};
 					if (tn.kind == nkind.N_TPTR) {
 						isglobalptr = true;
 						globalname = bn;
 						esz = elemsizeofc(c, tn);
 						signed_elem = elemissignedc(c, tn);
+						float_elem = elemisfloatc(c, tn);
+						f32_elem = elemisf32c(c, tn);
 					};
 				};
 			};
@@ -799,7 +810,7 @@ fn cgindex(c: *cgen, n: *node) void = {
 			// cgen.c:3517-18). esz-only — N_DOT-base signedness
 			// stays unset, as before.
 			let dt: *tinfo = n.type_: *tinfo;
-			if (dt != nil) { esz = dt.size: i32; elemisstr = typeisstr(dt); elemisslice = typeisslice(dt); };
+			if (dt != nil) { esz = dt.size: i32; elemisstr = typeisstr(dt); elemisslice = typeisslice(dt); float_elem = typeisfloat(dt); f32_elem = typeisf32(dt); };
 		} else { if (base.kind == nkind.N_INDEX) {
 			// #60: chained `names[i][k]` — n.type_ is the checker-
 			// stamped outer element tinfo (indexresult over the inner
@@ -810,6 +821,8 @@ fn cgindex(c: *cgen, n: *node) void = {
 			if (et != nil) {
 				esz = et.size: i32;
 				signed_elem = typeissigned(et);
+				float_elem = typeisfloat(et);
+				f32_elem = typeisf32(et);
 			};
 		};};};
 	};
@@ -891,6 +904,18 @@ fn cgindex(c: *cgen, n: *node) void = {
 			cgslicehdr(c, "BX");
 			return;
 		};
+		// #119: float element → MOVSS/MOVSD into X0 (the consumer's
+		// ADDSD/MOVSD spill machinery already expects X0); the integer
+		// loadopsz below would leave it in AX and the SSE side reads
+		// stale. Twin of cgen.c:2014's scalar-float global load.
+		if (float_elem) {
+			let fop1: str = "MOVSD";
+			if (f32_elem) { fop1 = "MOVSS"; };
+			emitline("\t");
+			emitline(fop1);
+			emitline("\t(BX), X0\n");
+			return;
+		};
 		let lop1: str = loadopsz(signed_elem, esz);
 		emitline("\t");
 		emitline(lop1);
@@ -930,6 +955,15 @@ fn cgindex(c: *cgen, n: *node) void = {
 			cgslicehdr(c, "BX");
 			return;
 		};
+		// #119: float element → X0 (see the global arm above).
+		if (float_elem) {
+			let fop2: str = "MOVSD";
+			if (f32_elem) { fop2 = "MOVSS"; };
+			emitline("\t");
+			emitline(fop2);
+			emitline("\t(BX), X0\n");
+			return;
+		};
 		let lop2: str = loadopsz(signed_elem, esz);
 		emitline("\t");
 		emitline(lop2);
@@ -961,6 +995,16 @@ fn cgindex(c: *cgen, n: *node) void = {
 		cgslicehdr(c, "AX");
 		return;
 	};
+	// #119: float element → X0 (see the global arm above). The base
+	// address is in AX; MOVSS/MOVSD reads the element into X0.
+	if (float_elem) {
+		let fop3: str = "MOVSD";
+		if (f32_elem) { fop3 = "MOVSS"; };
+		emitline("\t");
+		emitline(fop3);
+		emitline("\t(AX), X0\n");
+		return;
+	};
 	let lop3: str = loadopsz(signed_elem, esz);
 	emitline("\t");
 	emitline(lop3);

selfhost/cmd/wcc/cgenutil.ww

@@ -791,6 +791,34 @@ fn elemissignedc(c: *cgen, t: *node) bool = {
 	return typeissigned(ti.sub);
 };
 
+// elemisfloatc — given an indexable type-AST (`*T`, `[]T`, `[N]T`), is
+// its element an f32/f64? Used by cgindex to route the element load to
+// MOVSS/MOVSD into X0 instead of the integer loadopsz into AX (#119 —
+// the array-element twin of the scalar-float global load at cgen.c:
+// 2014). Reads through the stamped tinfo, peeling TY_NAMED before the
+// .sub read exactly as elemissignedc does (#64/#65). Float-ness comes
+// from the SAME tinfo the esz already reads — never a fresh node-stamp
+// (the unstamped-base trap that broke the exprfloatkind collapse, #121).
+fn elemisfloatc(c: *cgen, t: *node) bool = {
+	if (t == nil) { return false; };
+	let ti: *tinfo = t.type_: *tinfo;
+	if (ti == nil) { return false; };
+	for (ti != nil && ti.kind == tykind.TY_NAMED) { ti = ti.under; };
+	if (ti == nil) { return false; };
+	return typeisfloat(ti.sub);
+};
+
+// elemisf32c — narrower elemisfloatc: true only when the element is f32,
+// so cgindex picks MOVSS over MOVSD at the #119 element load.
+fn elemisf32c(c: *cgen, t: *node) bool = {
+	if (t == nil) { return false; };
+	let ti: *tinfo = t.type_: *tinfo;
+	if (ti == nil) { return false; };
+	for (ti != nil && ti.kind == tykind.TY_NAMED) { ti = ti.under; };
+	if (ti == nil) { return false; };
+	return typeisf32(ti.sub);
+};
+
 // fieldissignedc — does this field/element type-AST need sign-
 // extension on a sub-word load? One-liner via typeissigned (cstage
 // cgen.c:240 `fld_issigned` SSoT). t.type_ is stamped at check.ww
@@ -1865,6 +1893,21 @@ export fn exprfloatkind(c: *cgen, n: *node) i32 = {
 		if (isfloattype(c, n.rhs)) { return 2; };
 		return 0;
 	};
+	if (k == nkind.N_INDEX) {
+		// #119: a float array/slice element feeds cgbin / cgcast through
+		// X0 (the #119 load is MOVSS/MOVSD into X0). Without this arm the
+		// wwstage consumer falls to integer (PUSHQ/ADDQ, MOVSXD) while
+		// the cstage reads the stamped operand type and uses ADDSD/
+		// CVTTSD2SI — a rule-10 divergence the #119 load fix exposes (the
+		// consumer was never aligned for indexed float operands). The
+		// index-result type_ IS checker-stamped (cgindex reads it for
+		// esz at the N_DOT/N_INDEX-base arms), so this is NOT the
+		// unstamped-N_MLET-base trap that deferred the broader collapse
+		// (#121) — only the always-stamped N_INDEX case is classified.
+		if (isf32type(c, n)) { return 1; };
+		if (isfloattype(c, n)) { return 2; };
+		return 0;
+	};
 	if (k == nkind.N_IDENT) {
 		let lc: *local = localfindnode(c, n.str);
 		if (lc != nil) {

selfhost/cmd/wwdump/main.combined.ww

@@ -11658,6 +11658,34 @@ fn elemissignedc(c: *cgen, t: *node) bool = {
 	return typeissigned(ti.sub);
 };
 
+// elemisfloatc — given an indexable type-AST (`*T`, `[]T`, `[N]T`), is
+// its element an f32/f64? Used by cgindex to route the element load to
+// MOVSS/MOVSD into X0 instead of the integer loadopsz into AX (#119 —
+// the array-element twin of the scalar-float global load at cgen.c:
+// 2014). Reads through the stamped tinfo, peeling TY_NAMED before the
+// .sub read exactly as elemissignedc does (#64/#65). Float-ness comes
+// from the SAME tinfo the esz already reads — never a fresh node-stamp
+// (the unstamped-base trap that broke the exprfloatkind collapse, #121).
+fn elemisfloatc(c: *cgen, t: *node) bool = {
+	if (t == nil) { return false; };
+	let ti: *tinfo = t.type_: *tinfo;
+	if (ti == nil) { return false; };
+	for (ti != nil && ti.kind == tykind.TY_NAMED) { ti = ti.under; };
+	if (ti == nil) { return false; };
+	return typeisfloat(ti.sub);
+};
+
+// elemisf32c — narrower elemisfloatc: true only when the element is f32,
+// so cgindex picks MOVSS over MOVSD at the #119 element load.
+fn elemisf32c(c: *cgen, t: *node) bool = {
+	if (t == nil) { return false; };
+	let ti: *tinfo = t.type_: *tinfo;
+	if (ti == nil) { return false; };
+	for (ti != nil && ti.kind == tykind.TY_NAMED) { ti = ti.under; };
+	if (ti == nil) { return false; };
+	return typeisf32(ti.sub);
+};
+
 // fieldissignedc — does this field/element type-AST need sign-
 // extension on a sub-word load? One-liner via typeissigned (cstage
 // cgen.c:240 `fld_issigned` SSoT). t.type_ is stamped at check.ww
@@ -12732,6 +12760,21 @@ export fn exprfloatkind(c: *cgen, n: *node) i32 = {
 		if (isfloattype(c, n.rhs)) { return 2; };
 		return 0;
 	};
+	if (k == nkind.N_INDEX) {
+		// #119: a float array/slice element feeds cgbin / cgcast through
+		// X0 (the #119 load is MOVSS/MOVSD into X0). Without this arm the
+		// wwstage consumer falls to integer (PUSHQ/ADDQ, MOVSXD) while
+		// the cstage reads the stamped operand type and uses ADDSD/
+		// CVTTSD2SI — a rule-10 divergence the #119 load fix exposes (the
+		// consumer was never aligned for indexed float operands). The
+		// index-result type_ IS checker-stamped (cgindex reads it for
+		// esz at the N_DOT/N_INDEX-base arms), so this is NOT the
+		// unstamped-N_MLET-base trap that deferred the broader collapse
+		// (#121) — only the always-stamped N_INDEX case is classified.
+		if (isf32type(c, n)) { return 1; };
+		if (isfloattype(c, n)) { return 2; };
+		return 0;
+	};
 	if (k == nkind.N_IDENT) {
 		let lc: *local = localfindnode(c, n.str);
 		if (lc != nil) {
@@ -14944,6 +14987,11 @@ fn cgindex(c: *cgen, n: *node) void = {
 	let idx: *node = n.rhs;
 	let esz: i32 = 8;
 	let signed_elem: bool = false;
+	// #119: float element loads route to MOVSS/MOVSD into X0, not the
+	// integer loadopsz into AX. float_elem/f32_elem are set per-branch
+	// from the SAME tinfo esz reads — never a fresh node-stamp (#121).
+	let float_elem: bool = false;
+	let f32_elem: bool = false;
 	// #1/Phase 3: str and slice are both 24B (and a >16B struct is
 	// 24B+ too), so the header branches below MUST gate on KIND
 	// (elemisstr/elemisslice, mirroring cstage's elem_is_str||
@@ -14969,6 +15017,8 @@ fn cgindex(c: *cgen, n: *node) void = {
 			if (baselocal != nil) {
 				esz = elemsizeofc(c, baselocal.tnode);
 				signed_elem = elemissignedc(c, baselocal.tnode);
+				float_elem = elemisfloatc(c, baselocal.tnode);
+				f32_elem = elemisf32c(c, baselocal.tnode);
 			} else {
 				let tn: *node = letvartnode(c, bn);
 				if (tn != nil) {
@@ -14977,12 +15027,16 @@ fn cgindex(c: *cgen, n: *node) void = {
 						globalname = bn;
 						esz = elemsizeofc(c, tn);
 						signed_elem = elemissignedc(c, tn);
+						float_elem = elemisfloatc(c, tn);
+						f32_elem = elemisf32c(c, tn);
 					};
 					if (tn.kind == nkind.N_TPTR) {
 						isglobalptr = true;
 						globalname = bn;
 						esz = elemsizeofc(c, tn);
 						signed_elem = elemissignedc(c, tn);
+						float_elem = elemisfloatc(c, tn);
+						f32_elem = elemisf32c(c, tn);
 					};
 				};
 			};
@@ -14994,7 +15048,7 @@ fn cgindex(c: *cgen, n: *node) void = {
 			// cgen.c:3517-18). esz-only — N_DOT-base signedness
 			// stays unset, as before.
 			let dt: *tinfo = n.type_: *tinfo;
-			if (dt != nil) { esz = dt.size: i32; elemisstr = typeisstr(dt); elemisslice = typeisslice(dt); };
+			if (dt != nil) { esz = dt.size: i32; elemisstr = typeisstr(dt); elemisslice = typeisslice(dt); float_elem = typeisfloat(dt); f32_elem = typeisf32(dt); };
 		} else { if (base.kind == nkind.N_INDEX) {
 			// #60: chained `names[i][k]` — n.type_ is the checker-
 			// stamped outer element tinfo (indexresult over the inner
@@ -15005,6 +15059,8 @@ fn cgindex(c: *cgen, n: *node) void = {
 			if (et != nil) {
 				esz = et.size: i32;
 				signed_elem = typeissigned(et);
+				float_elem = typeisfloat(et);
+				f32_elem = typeisf32(et);
 			};
 		};};};
 	};
@@ -15086,6 +15142,18 @@ fn cgindex(c: *cgen, n: *node) void = {
 			cgslicehdr(c, "BX");
 			return;
 		};
+		// #119: float element → MOVSS/MOVSD into X0 (the consumer's
+		// ADDSD/MOVSD spill machinery already expects X0); the integer
+		// loadopsz below would leave it in AX and the SSE side reads
+		// stale. Twin of cgen.c:2014's scalar-float global load.
+		if (float_elem) {
+			let fop1: str = "MOVSD";
+			if (f32_elem) { fop1 = "MOVSS"; };
+			emitline("\t");
+			emitline(fop1);
+			emitline("\t(BX), X0\n");
+			return;
+		};
 		let lop1: str = loadopsz(signed_elem, esz);
 		emitline("\t");
 		emitline(lop1);
@@ -15125,6 +15193,15 @@ fn cgindex(c: *cgen, n: *node) void = {
 			cgslicehdr(c, "BX");
 			return;
 		};
+		// #119: float element → X0 (see the global arm above).
+		if (float_elem) {
+			let fop2: str = "MOVSD";
+			if (f32_elem) { fop2 = "MOVSS"; };
+			emitline("\t");
+			emitline(fop2);
+			emitline("\t(BX), X0\n");
+			return;
+		};
 		let lop2: str = loadopsz(signed_elem, esz);
 		emitline("\t");
 		emitline(lop2);
@@ -15156,6 +15233,16 @@ fn cgindex(c: *cgen, n: *node) void = {
 		cgslicehdr(c, "AX");
 		return;
 	};
+	// #119: float element → X0 (see the global arm above). The base
+	// address is in AX; MOVSS/MOVSD reads the element into X0.
+	if (float_elem) {
+		let fop3: str = "MOVSD";
+		if (f32_elem) { fop3 = "MOVSS"; };
+		emitline("\t");
+		emitline(fop3);
+		emitline("\t(AX), X0\n");
+		return;
+	};
 	let lop3: str = loadopsz(signed_elem, esz);
 	emitline("\t");
 	emitline(lop3);

test/wcc/946_floatarr_run.c

@@ -0,0 +1,211 @@
+/*
+ * 946_floatarr_run — runtime + byte-id net for #119: a float ARRAY
+ * ELEMENT load must land in X0 (MOVSS/MOVSD), not the integer register
+ * file (MOVQ → AX). cgindex's element-load sites ended in the integer
+ * loadopsz, so `let a: [3]f64 = [...]; a[0] + a[1]` loaded the element
+ * into AX while the consumer's ADDSD read a stale X0 → wrong sum. #119
+ * adds a float-element branch (MOVSS f32 / MOVSD f64 into X0) at all
+ * three wwstage cgindex sites (global, baselocal, fallback) and both
+ * cstage N_INDEX element-load sites, deriving float-ness from the same
+ * stamped element tinfo the esz already reads (elemisfloatc/elemisf32c
+ * for ident bases, typeisfloat/typeisf32(n.type_) for N_DOT/N_INDEX
+ * bases — never an unstamped node-stamp, dodging the #121 trap).
+ *
+ * #119 also required a wwstage exprfloatkind N_INDEX arm: the consumer
+ * (cgbin / cgcast) classified an indexed float operand as INTEGER and
+ * fell to PUSHQ/ADDQ/MOVSXD, while the cstage read the stamped operand
+ * type and used ADDSD/CVTTSD2SI — a rule-10 divergence the load fix
+ * exposed. The N_INDEX result type_ is checker-stamped (cgindex reads
+ * it for esz), so this is not the unstamped-N_MLET case deferred under
+ * #121.
+ *
+ * Each row carries (a) a cstage `ww build` + run asserting the exit
+ * code, and (b) a w6c vs w6c_ww `.s` cmp (rule-10 byte-id). A row whose
+ * want_exit is RUN_SKIP runs only the byte-id leg: the f32 row exercises
+ * the f32 LOAD + cs==ww but its runtime VALUE is blocked by a SEPARATE,
+ * pre-existing bug — the f32 array-element STORE writes AX (the raw
+ * double low-bits) instead of the CVTSD2SS-narrowed X0 single, so every
+ * f32 array slot reads back 0.0f. That store-side twin is filed
+ * separately (#119-store); this probe still proves the f32 LOAD shape +
+ * cs==ww byte-identity.
+ */
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <unistd.h>
+#include <sys/stat.h>
+#include <sys/wait.h>
+
+#define RUN_SKIP (-1)
+
+static int
+runwait(const char *cmd)
+{
+	int rc = system(cmd);
+	if (rc == -1) return -1;
+	if (WIFEXITED(rc)) return WEXITSTATUS(rc);
+	return -1;
+}
+
+struct row { const char *label; const char *src; int want_exit; };
+
+static const struct row rows[] = {
+	/* f64 element load + float add: 1.5 + 2.5 == 4.0. On the bug the
+	 * elements loaded into AX and the ADDSD read a stale X0 -> != 4.0. */
+	{ "f64_arith",
+	  "package main;\n"
+	  "export fn main() i32 = {\n"
+	  "	let a: [3]f64 = [1.5, 2.5, 9.0];\n"
+	  "	if (a[0] + a[1] != 4.0) { return 1; };\n"
+	  "	return 0;\n"
+	  "};\n", 0 },
+	/* f64 element -> i32 cast: 1.5 truncates to 1. On the bug the cast
+	 * operand classified integer (MOVSXD on AX) not CVTTSD2SI on X0. */
+	{ "f64_trunc",
+	  "package main;\n"
+	  "export fn main() i32 = {\n"
+	  "	let a: [3]f64 = [1.5, 2.5, 9.0];\n"
+	  "	return a[0]: i32;\n"
+	  "};\n", 1 },
+	/* third element, non-adjacent index: a[2] == 9.0. */
+	{ "f64_elem2",
+	  "package main;\n"
+	  "export fn main() i32 = {\n"
+	  "	let a: [3]f64 = [1.5, 2.5, 9.0];\n"
+	  "	if (a[2] != 9.0) { return 1; };\n"
+	  "	return 0;\n"
+	  "};\n", 0 },
+	/* f32 element load (MOVSS into X0) + add, suffixed literals so
+	 * fold-1 narrows them. BYTE-ID ONLY: the runtime value is blocked by
+	 * the f32 array-element STORE bug (#119-store), so we assert only
+	 * that both stages emit the same (correct-load) asm. */
+	{ "f32_arith_byteid",
+	  "package main;\n"
+	  "export fn main() i32 = {\n"
+	  "	let b: [2]f32 = [1.5f32, 2.5f32];\n"
+	  "	if ((b[0] + b[1]): f64 != 4.0) { return 1; };\n"
+	  "	return 0;\n"
+	  "};\n", RUN_SKIP },
+	{ NULL, NULL, 0 }
+};
+
+static int
+slurp_eq(const char *a, const char *b)
+{
+	FILE *fa = fopen(a, "rb");
+	FILE *fb = fopen(b, "rb");
+	if (!fa || !fb) { if (fa) fclose(fa); if (fb) fclose(fb); return -1; }
+	int rc = 0;
+	for (;;) {
+		int ca = fgetc(fa);
+		int cb = fgetc(fb);
+		if (ca != cb) { rc = -1; break; }
+		if (ca == EOF) break;
+	}
+	fclose(fa); fclose(fb);
+	return rc;
+}
+
+int
+main(void)
+{
+	const char *bin = getenv("BIN");
+	if (!bin) bin = "out/bin";
+	char absbin[1024];
+	if (bin[0] != '/') {
+		char cwd[1024];
+		if (getcwd(cwd, sizeof cwd) == NULL) return 1;
+		snprintf(absbin, sizeof absbin, "%s/%s", cwd, bin);
+		bin = absbin;
+	}
+
+	char w6c[1100], w6c_ww[1100];
+	snprintf(w6c, sizeof w6c, "%s/w6c", bin);
+	snprintf(w6c_ww, sizeof w6c_ww, "%s/w6c_ww", bin);
+	if (access(w6c_ww, X_OK) != 0) {
+		fprintf(stderr, "floatarr: w6c_ww missing — cannot run the "
+		    "cs==ww byte-id gate (the whole point of this test)\n");
+		return 1;
+	}
+
+	int n = 0, fail = 0;
+	for (int i = 0; rows[i].src; i++, n++) {
+		char src[64];
+		snprintf(src, sizeof src, "/tmp/wwfarr_%d_%d.ww", getpid(), i);
+		FILE *f = fopen(src, "wb");
+		if (f == NULL) { fail++; continue; }
+		fputs(rows[i].src, f);
+		fclose(f);
+
+		/* (a) cstage build + run (skipped for byte-id-only rows). */
+		if (rows[i].want_exit != RUN_SKIP) {
+			char tmpdir[64];
+			snprintf(tmpdir, sizeof tmpdir, "/tmp/wwfarr_%d_d_%d",
+			    getpid(), i);
+			mkdir(tmpdir, 0755);
+
+			char cmd[2048];
+			snprintf(cmd, sizeof cmd, "cd %s && %s/ww build %s",
+			    tmpdir, bin, src);
+			if (runwait(cmd) != 0) {
+				fprintf(stderr, "row[%s]: cstage build failed\n",
+				    rows[i].label);
+				fail++;
+				unlink(src); rmdir(tmpdir);
+				continue;
+			}
+
+			char outbin[128];
+			const char *base = strrchr(src, '/');
+			base = base ? base + 1 : src;
+			snprintf(outbin, sizeof outbin, "%s/%s", tmpdir, base);
+			char *dot = strrchr(outbin, '.');
+			if (dot && strcmp(dot, ".ww") == 0) *dot = '\0';
+
+			int got = runwait(outbin);
+			if (got != rows[i].want_exit) {
+				fprintf(stderr, "row[%s]: cstage exit %d, want %d\n",
+				    rows[i].label, got, rows[i].want_exit);
+				fail++;
+			}
+			unlink(outbin); rmdir(tmpdir);
+		}
+
+		/* (b) cs==ww byte-id gate: emit .s from both stages, cmp. */
+		char cs_s[64], ws_s[64];
+		snprintf(cs_s, sizeof cs_s, "/tmp/wwfarr_%d_%d_cs.s",
+		    getpid(), i);
+		snprintf(ws_s, sizeof ws_s, "/tmp/wwfarr_%d_%d_ww.s",
+		    getpid(), i);
+
+		char cmd[2048];
+		snprintf(cmd, sizeof cmd, "%s -o %s %s 2>/dev/null",
+		    w6c, cs_s, src);
+		if (runwait(cmd) != 0) {
+			fprintf(stderr, "row[%s]: w6c failed\n", rows[i].label);
+			fail++; unlink(src); continue;
+		}
+		snprintf(cmd, sizeof cmd, "%s -o %s %s 2>/dev/null",
+		    w6c_ww, ws_s, src);
+		if (runwait(cmd) != 0) {
+			fprintf(stderr, "row[%s]: w6c_ww failed\n",
+			    rows[i].label);
+			fail++; unlink(src); unlink(cs_s); continue;
+		}
+		if (slurp_eq(cs_s, ws_s) != 0) {
+			fprintf(stderr,
+			    "row[%s]: cstage/wwstage .s DIFFER (rule-10 "
+			    "byte-id violation)\n", rows[i].label);
+			fail++;
+		}
+		unlink(src); unlink(cs_s); unlink(ws_s);
+	}
+
+	if (fail) {
+		fprintf(stderr, "%d/%d float-array element tests failed\n",
+		    fail, n);
+		return 1;
+	}
+	printf("floatarr: %d/%d ok (cstage run + cs==ww byte-id)\n", n, n);
+	return 0;
+}