Files
ww/test/wcc/739_chained_index.c
Hojun-Cho aa8ca47943 selfhost+test: route chained N_INDEX outer element size through indexvaluetnode (#24)
Wwstage cgindex's base-inspection (cgenexpr.ww) only computed esz/
signed_elem when base.kind == N_IDENT or N_DOT. For a chained
`names[i][k]` (names: **u8) the outer N_INDEX has base.kind ==
N_INDEX; esz fell through to the default 8 so the outer load
emitted `MOVQ (AX), AX` over a 1-byte u8 plus a stray
`MOVQ $8, CX; IMULQ CX, AX` scaling on the outer index that cstage
doesn't emit. Wrong-width-narrow-load: the byte was read as 8 bytes
(reaching into adjacent memory) and the outer offset multiplied by
sizeof *u8 instead of sizeof u8.

Cstage walks n->lhs->type directly via the typed AST
(cmd/w6c/cgen.c idx_eff → eff->sub->size at N_INDEX). Wwstage
needed the parallel via indexvaluetnode — return the value-type
of an N_INDEX expression by stripping one element layer off base's
type, recursing for chained inner. cgindex's else-if chain now
adds the N_INDEX arm: call indexvaluetnode + elemsizeofc/
elemissignedc.

Class A wwstage cgen UNDER. Surfaced first time the codebase
exercised the **T[i][k] shape — through expanddir in
selfhost/cmd/ww/main.ww (post-#22 dir-enum, commit 9e0816e). The
workaround there split names[i][k] into `let nm: *u8 = names[i];
nm[k]` to route through the bare-pointer index path. Retired in
this commit: expanddir uses the natural chained form since the
read path is now byte-identical across stages.

Bundling justification (rule 11): the workaround retirement is
the in-tree verification this fix works — without retiring,
neither bootstrap byte-id nor 995_self_rebuild exercises the
chained read shape. Test 739_chained_index pins cstage-byte-
identical asm for **u8 (MOVZBQ load, 1 inner-stride-8 IMULQ pair,
no outer scale) + **i32 (MOVSXD load, inner $8 + outer $4 IMULQ
pairs).

Sister latents filed (no in-tree consumer, no probe):
  Task #27 — cgassign chained-write N_INDEX: write path
  `names[i][k] = v` for **u8 has the same dispatch gap. Selfhost +
  lib grep is empty.
  New latent (filed during review) — cgindex N_DOT base on chained
  index: `obj.mat[i][k]` over a struct-field base falls back to
  esz=8. indexvaluetnode currently handles N_IDENT + N_INDEX bases
  only.

113/113 ok. ww2 == ww3 == ww4 byte-id.
2026-05-18 19:40:41 +09:00

272 lines
8.1 KiB
C

/*
* 739_chained_index — sentinel for #24. Pins wwstage's cgindex to
* compute the element size of the outer N_INDEX in `arr[i][k]` from
* the value-type of the inner N_INDEX, instead of defaulting to 8.
*
* Pre-fix wwstage cgindex (selfhost/cmd/wcc/cgenexpr.ww) only
* walked `base.kind == N_IDENT` and `base.kind == N_DOT` for the
* esz/signed_elem dispatch. When base was the inner N_INDEX of a
* chained `names[i][k]` shape (names: **u8), esz stayed at the
* default 8 and the load fell through to MOVQ — an 8-byte load over
* a 1-byte u8 element, plus a stray `MOVQ $8, CX; IMULQ CX, AX` on
* the outer index that cstage doesn't emit.
*
* Cstage walks `n->lhs->type` directly (cmd/w6c/cgen.c idx_eff +
* N_INDEX, ~line 6011) — the typed AST already says the post-inner-
* index value is *u8, so eff->sub->size = 1 lands naturally. Wwstage
* needed the mirror via indexvaluetnode.
*
* Class A wwstage cgen UNDER. Surfaced first time the codebase
* exercised the **T[i][k] shape — through the dir-enum work in
* selfhost/cmd/ww/main.ww `expanddir` (task #22, predecessor commit
* 9e0816e). Workaround there split `names[i][k]` into `let nm: *u8 =
* names[i]; nm[k]` to route through the bare-pointer index path.
*
* Sentinel per row: in the `probe` body, assert the final element
* load uses the expected narrow MOV mnemonic, the outer-index scale
* is absent (esz=1) or matches `MOVQ $<esz>, CX`, and the cstage
* vs wwstage asm is byte-identical.
*/
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <unistd.h>
#include <sys/wait.h>
static int
runwait(const char *cmd)
{
int rc = system(cmd);
if (rc == -1) return -1;
if (WIFEXITED(rc)) return WEXITSTATUS(rc);
return -1;
}
/* `loadmov` = expected mnemonic for the trailing `<MOV> (AX), AX`
* (or similar) load at the outer index. `outerscale` = expected esz
* for the outer index (1 → no IMULQ; 4 → `MOVQ $4, CX; IMULQ`). */
struct row {
const char *label;
const char *src;
const char *loadmov;
int outerscale;
};
static const struct row rows[] = {
/* The load-bearing case: **u8 chained-index that the dir-enum
* workaround in selfhost/cmd/ww/main.ww `expanddir` had to dodge. */
{ "chained_u8",
"fn probe(names: **u8) u8 = {\n"
" let i: i32 = 0;\n"
" let k: u64 = 0u64;\n"
" return names[i][k];\n"
"};\n"
"export fn main() i32 = { return 0; };\n",
"MOVZBQ", 1 },
/* **i32 — 4-byte signed-narrow load on the outer index, IMULQ $4
* for the outer scaling, IMULQ $8 for the inner *i32 stride. */
{ "chained_i32",
"fn probe(mat: **i32) i32 = {\n"
" let i: i32 = 0;\n"
" let k: u64 = 0u64;\n"
" return mat[i][k];\n"
"};\n"
"export fn main() i32 = { return 0; };\n",
"MOVSXD", 4 },
};
static int
slurp(const char *path, char *buf, size_t cap)
{
FILE *f = fopen(path, "rb");
if (!f) return -1;
size_t n = fread(buf, 1, cap - 1, f);
fclose(f);
buf[n] = '\0';
return (int)n;
}
static int
emit_s(const char *w6c, const struct row *r, int i, char *out_s, size_t cap)
{
char src[96], cmd[1024];
snprintf(src, sizeof src, "/tmp/chidx_%d_%d.ww", getpid(), i);
snprintf(out_s, cap, "/tmp/chidx_%d_%d_%s.s",
getpid(), i, w6c[strlen(w6c) - 1] == 'w' ? "ww" : "c");
FILE *f = fopen(src, "wb");
if (!f) return -1;
fputs(r->src, f);
fclose(f);
snprintf(cmd, sizeof cmd, "%s -o %s %s 2>/dev/null", w6c, out_s, src);
int rc = runwait(cmd);
unlink(src);
return rc;
}
/* Inside `TEXT probe`, the final element load must use the
* expected narrow MOV mnemonic on `(AX), AX`. Pre-fix wwstage
* emitted plain `MOVQ (AX), AX`. */
static int
check_loadmov(const char *spath, const struct row *r, const char *stage)
{
char buf[1 << 14];
if (slurp(spath, buf, sizeof buf) < 0) {
fprintf(stderr, "row[%s][%s]: cannot read %s\n",
r->label, stage, spath);
return -1;
}
const char *fn = strstr(buf, "TEXT probe");
if (!fn) {
fprintf(stderr,
"row[%s][%s]: no TEXT probe in %s\n",
r->label, stage, spath);
return -1;
}
const char *ret = strstr(fn, "\tRET\n");
char needle[64];
snprintf(needle, sizeof needle, "\t%s\t(AX), AX\n", r->loadmov);
const char *m = strstr(fn, needle);
if (!m || (ret && m > ret)) {
fprintf(stderr,
"row[%s][%s]: expected `%s (AX), AX` in probe body\n",
r->label, stage, r->loadmov);
return -1;
}
return 0;
}
/* Negative: pre-fix wwstage emitted a stray `MOVQ $8, CX; IMULQ CX,
* AX` for the OUTER index of a **u8 chain (because esz defaulted to
* 8). For a u8 outer the correct emit is no scaling at all. Assert
* the count of `MOVQ $8, CX` followed by `IMULQ CX, AX` pairs in the
* probe body matches the expected inner-only count (= 1 for **T;
* the inner index of *T elements always scales by 8). */
static int
check_inner_scale_only(const char *spath, const struct row *r,
const char *stage)
{
char buf[1 << 14];
if (slurp(spath, buf, sizeof buf) < 0) return -1;
const char *fn = strstr(buf, "TEXT probe");
if (!fn) return -1;
const char *ret = strstr(fn, "\tRET\n");
if (!ret) ret = fn + strlen(fn);
int n_inner = 0, n_outer = 0;
const char *p = fn;
while (p < ret) {
const char *inner = strstr(p, "\tMOVQ\t$8, CX\n");
if (!inner || inner >= ret) break;
const char *next = strstr(inner, "\tIMULQ\tCX, AX\n");
if (!next || next >= ret) { p = inner + 1; continue; }
n_inner++;
p = next + 1;
}
if (r->outerscale == 1) {
/* Pre-fix wwstage had two `MOVQ $8, CX; IMULQ` pairs (one
* for the outer index that shouldn't scale at all). Cstage
* has one — for the inner *u8 stride only. */
if (n_inner != 1) {
fprintf(stderr,
"row[%s][%s]: expected exactly 1 inner `MOVQ $8, "
"CX; IMULQ CX, AX` pair (no outer scaling for u8), "
"got %d\n", r->label, stage, n_inner);
return -1;
}
} else {
/* For **i32: inner stride is 8 (sizeof *i32), outer scale is
* 4 (sizeof i32). Assert one `MOVQ $8, CX` for inner and one
* `MOVQ $4, CX` for outer. */
p = fn;
while (p < ret) {
const char *outer = strstr(p, "\tMOVQ\t$4, CX\n");
if (!outer || outer >= ret) break;
const char *next = strstr(outer, "\tIMULQ\tCX, AX\n");
if (!next || next >= ret) { p = outer + 1; continue; }
n_outer++;
p = next + 1;
}
if (n_inner != 1 || n_outer != 1) {
fprintf(stderr,
"row[%s][%s]: expected 1 inner `MOVQ $8` + 1 outer "
"`MOVQ $4` IMULQ pair, got inner=%d outer=%d\n",
r->label, stage, n_inner, n_outer);
return -1;
}
}
return 0;
}
int
main(void)
{
const char *bin = getenv("BIN");
if (!bin) bin = "out/bin";
char absbin[512];
if (bin[0] != '/') {
char cwd[256];
if (getcwd(cwd, sizeof cwd) == NULL) return 1;
snprintf(absbin, sizeof absbin, "%s/%s", cwd, bin);
bin = absbin;
}
char w6c[640], w6c_ww[640];
snprintf(w6c, sizeof w6c, "%s/w6c", bin);
snprintf(w6c_ww, sizeof w6c_ww, "%s/w6c_ww", bin);
int have_ww = (access(w6c_ww, X_OK) == 0);
int n = (int)(sizeof rows / sizeof rows[0]);
int total = 0, fail = 0;
for (int i = 0; i < n; i++) {
char cs_path[128], ws_path[128];
if (emit_s(w6c, &rows[i], i, cs_path, sizeof cs_path) != 0) {
fprintf(stderr,
"chained_index[cstage][%s]: w6c failed\n",
rows[i].label);
fail++; total++; continue;
}
total += 2;
if (check_loadmov(cs_path, &rows[i], "cstage") != 0) fail++;
if (check_inner_scale_only(cs_path, &rows[i], "cstage") != 0)
fail++;
if (!have_ww) { unlink(cs_path); continue; }
if (emit_s(w6c_ww, &rows[i], i, ws_path, sizeof ws_path) != 0) {
fprintf(stderr,
"chained_index[wwstage][%s]: w6c_ww failed\n",
rows[i].label);
fail++; total++;
unlink(cs_path); continue;
}
total += 2;
if (check_loadmov(ws_path, &rows[i], "wwstage") != 0) fail++;
if (check_inner_scale_only(ws_path, &rows[i], "wwstage") != 0)
fail++;
total++;
char cmd[512];
snprintf(cmd, sizeof cmd, "cmp -s %s %s", cs_path, ws_path);
if (runwait(cmd) != 0) {
fprintf(stderr,
"chained_index[%s]: cstage vs wwstage asm differs\n",
rows[i].label);
fail++;
}
unlink(cs_path); unlink(ws_path);
}
if (fail) {
fprintf(stderr,
"chained_index: %d/%d fixtures failed\n", fail, total);
return 1;
}
printf("chained_index: %d/%d ok\n", total, total);
return 0;
}