Hojun-Cho
e217cd32d1
Ports cmd/6l/{dyn,dynout}.c into selfhost/cmd/6l/{dyn,dynout}.ww:
ET_DYN .so loading + PT_INTERP/PT_DYNAMIC ELF emission with .rela.plt,
.gnu.version_r, BIND_NOW. lsym grows dyn fields; pass.ww promotes
undefs to dyn; out.ww dispatches; main.ww takes -L/-l. The ww driver
forwards -L/-l to 6l_ww so 'ww_ww build snake.ww -L /usr/lib -l ncurses
-l c' runs without cc.
Test 996 pins byte-identical output to C-6l on snake.
'make bootstrap' gains a fourth stage with cmp ww3 == ww4, proving
ww3 is byte-stable when used as a compiler — not just a coincidental
two-stage equilibrium.
Four wwstage 6c cgen quirks surfaced and are documented in dynout.ww's
header (two-level field-write through a pointer field, (scalar, str)
tuple returns, def : str, ≤6 arg calling convention).
116 lines
3.0 KiB
Plaintext
116 lines
3.0 KiB
Plaintext
// selfhost/cmd/6l/pass.ww — port of cmd/6l/pass.c.
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//
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// Resolution + relocation. l_resolve flags every undefined symbol
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// referenced by a relocation, and promotes those provided by some
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// loaded .so to "dynamic" with a freshly-assigned PLT slot.
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// l_relocate walks the rel list and patches the .text bytes in place
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// once the final virtual base is known. Dynamic refs are deferred:
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// their site is patched later in dynout, once the PLT vaddr is known.
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//
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// Supported relocation kinds: PC32 (=2), PLT32 (=4); both are 32-bit
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// PC-relative displacements (PLT32 == PC32 for static).
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use os;
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use sym;
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use dyn;
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def R_X86_64_PC32: i32 = 2;
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def R_X86_64_PLT32: i32 = 4;
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export fn l_resolve(l: *lnk) i32 = {
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// Initialise dynamic-linking sentinels. amalloc zeroes, so
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// is_dyn/dyn_lib start clean — but plt_idx and dynsym_idx
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// must be -1, not 0.
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let si: *lsym = l.syms;
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for (si != nil) {
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si.plt_idx = -1;
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si.dynsym_idx = -1;
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si = si.snext;
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};
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// Promote each undefined sym that some lso exports to dynamic
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// and hand it a PLT slot. Iteration order over the relocation
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// list determines slot numbering and is stable across runs.
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let r: *lrel = l.rels;
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for (r != nil) {
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if (r.sym != nil) {
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if (r.sym.defined == 0) {
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let sym: *lsym = r.sym;
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if (sym.is_dyn == 0) {
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let so: *lso = l.sos;
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for (so != nil) {
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if (l_so_provides(so, sym.name) != 0) {
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sym.is_dyn = 1;
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sym.dyn_lib = so;
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sym.plt_idx = l.dyn_n;
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l.dyn_n += 1;
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so = nil; // break
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} else {
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so = so.sonext;
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};
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};
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};
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};
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};
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r = r.rnext;
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};
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// What remains undefined truly is undefined.
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let r2: *lrel = l.rels;
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for (r2 != nil) {
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if (r2.sym != nil) {
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if (r2.sym.defined == 0) {
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if (r2.sym.is_dyn == 0) {
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os.write(2, "6l: undefined reference to '".ptr, 28u64);
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let nm: str = r2.sym.name;
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os.write(2, nm.ptr, nm.len: u64);
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os.write(2, "'\n".ptr, 2u64);
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l.errs += 1;
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};
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};
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};
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r2 = r2.rnext;
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};
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return l.errs;
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};
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fn patch_u32(p: *u8, v: u32) void = {
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p[0] = (v & 255u32): u8;
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p[1] = ((v >> 8u32) & 255u32): u8;
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p[2] = ((v >> 16u32) & 255u32): u8;
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p[3] = ((v >> 24u32) & 255u32): u8;
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};
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export fn l_relocate(l: *lnk, base: u64) i32 = {
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let r: *lrel = l.rels;
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for (r != nil) {
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if (r.sym != nil) {
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// Dynamic refs are patched later in dynout once the
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// PLT vaddr is known.
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if (r.sym.is_dyn != 0) {
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r = r.rnext;
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continue;
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};
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if (r.sym.defined != 0) {
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let k: i32 = r.kind;
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if (k == R_X86_64_PC32) {
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let site: u64 = base + r.off;
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let target: i64 = (base + r.sym.val): i64;
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let rel: i64 = (target - site: i64) + r.addend;
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patch_u32(l.text + r.off, rel: u32);
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} else { if (k == R_X86_64_PLT32) {
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let site: u64 = base + r.off;
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let target: i64 = (base + r.sym.val): i64;
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let rel: i64 = (target - site: i64) + r.addend;
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patch_u32(l.text + r.off, rel: u32);
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} else {
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os.write(2, "6l: unsupported reloc kind\n".ptr, 27u64);
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l.errs += 1;
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};};
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};
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};
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r = r.rnext;
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};
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return l.errs;
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};
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