Files
ww/test/lang/floatarr_test.ww
Hojun-Cho 60dec4a6bf test: migrate Fam11 float value tests to @test, keep ABI-conformance pins (#5-C4)
fold-2 chunk C4 (drew's Fam8-13 plan): 13 float value-row C drivers re-homed.
11 migrate to test/lang/*_test.ww @test row-tables (exact IEEE-bit asserts);
1 float-overflow reject row -> a runww //ww:error carrier. 956_tuprecv_f64
slims to a w6c_ww asserttyped pin (20 value rows -> @test; the stamp dimension
can't be a value/byte-id @test) -- mutation-proven non-vacuous (break #121
stamp -> RED 6/6 -> restore -> GREEN) + an in-test vacuity self-check.
946_structparam/structret stay whole: their SSE register-class .s-grep (SysV
ABI conformance, #165/#171a) is the genuine defect-guard, not @test-expressible.
Float was the predicted SSE-cursor byte-id hotspot -- zero fresh cs!=ww
surfaced; 951_f64cgen (cstage-only before) byte-ids clean. LANGBYTEID floor
82->93; test count 384->374 (10 deleted drivers; 956 + the 2 946 kept).
2026-06-24 03:25:47 +09:00

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// floatarr_test — float array-element load/store, migrated from
// test/wcc/946_floatarr_run.c (#5-C4, #119 + #122). A float ARRAY ELEMENT load
// must land in X0 (MOVSS/MOVSD), not the integer register file (MOVQ -> AX); the
// element STORE (array-lit init, arr[i]=, and [v...] repeat-fill) must route FROM
// X0 via MOVSS/MOVSD, not write the raw double low-bits via MOVL AX. Pre-fix the
// f64 elements loaded into AX while the consumer's ADDSD read a stale X0, and f32
// slots read back garbage. The N_INDEX result type is checker-stamped (dodging
// the #121 unstamped trap). Both stages byte-identical; T1 run + T2 byte-id.
package floatarr_test;
@test fn f64_arith() void = {
let a: [3]f64 = [1.5, 2.5, 9.0];
assert(a[0] + a[1] == 4.0);
};
@test fn f64_trunc() void = {
let a: [3]f64 = [1.5, 2.5, 9.0];
assert(a[0]: i32 == 1);
};
@test fn f64_elem2() void = {
let a: [3]f64 = [1.5, 2.5, 9.0];
assert(a[2] == 9.0);
};
@test fn f32_arith() void = {
let b: [2]f32 = [1.5f32, 2.5f32];
assert((b[0] + b[1]): f64 == 4.0);
};
// arr[i]= index store (#122) into a [0.0f32,0.0f32]-init array.
@test fn f32_index_store() void = {
let b: [2]f32 = [0.0f32, 0.0f32];
b[0] = 1.5f32;
b[1] = 2.5f32;
assert((b[0] + b[1]): f64 == 4.0);
};
// [v...] repeat-fill init store (#122): 1.5 * 3 == 4.5 (exact in IEEE).
@test fn f32_repeat_fill() void = {
let c: [3]f32 = [1.5f32...];
assert((c[0] + c[1] + c[2]): f64 == 4.5);
};