Hojun-Cho
7b9488706b
Flip the soft-default to a hard "missing package clause" error symmetrically in both stages (cmd/wcc/parse.c + lib/ww/syntax/parse.ww): the first real decl of a primary section with empty pathmod/resetmod and no seen clause is now rejected. Closes the documented soft-default divergence (the 63-wrapper carve-out). The gate flip can't be split from the migration it breaks, so this is one atomic commit: ~80 test/wcc wrappers gain `package main;` via a shared wwtestpkg.h helper, 6 data fixtures plus 17 asm-grep assertions update for the bare->main.<leaf> root-helper mangle shift, and rt/ declares `package rt;` with @symbol pinning the bare rt_ensure/rt_malloc linker names. Root mangling narrows: the executable entry `main` stays bare (existing carve-out), but root helper symbols become main.X. The #84 cluster is rewritten to assert main.run distinct from aa.run/test.run; its cgen fix and bare machinery are retained — still load-bearing for package-less module-reset deps. New table-driven test 782_strict_package.c (6 rows, both stages). Retiring //ww:module-reset is deferred to #24b: it is load-bearing (clears the .wwi pathmod so the body's package clause asserts), not a vestige; fusing its removal here would be a silent mismatch. All byte-id gates green; full make test reports "all 335 tests passed".
488 lines
18 KiB
C
488 lines
18 KiB
C
/*
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* 710_cast_enum_movl — cstage and wwstage agree byte-for-byte on the
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* N_CAST narrow-clamp under the principled identity-width identity-
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* sign predicate (task #33). Extended from the original #25 fixture
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* which mirrored wwstage's N_TENUM lacuna as a single-site `tu->kind
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* == TY_ENUM` gate in cstage.
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*
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* Predicate (both stages):
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* skip the narrow-clamp on an int→int cast iff
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* src.width == dst.width && src.signed == dst.signed
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* where (width, signedness) resolve through TY_NAMED / TY_ENUM
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* alias chains in cstage and N_TBANG / N_TENUM / N_TNAME-alias
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* chains in wwstage. Bool keeps its dedicated ANDQ $255 contract.
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*
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* History: #25 (b5632b1) shipped a single-site gate in cstage —
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* `dst_is_enum → skip` — that made cstage byte-for-byte identical
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* to wwstage on a u32→enum-u32 cast. It also inadvertently kept a
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* silent miscompile alive: u32→enum-u8 and i64→enum-i32 also took
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* the dst-is-enum exit, so the narrow-clamp didn't fire on a
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* genuinely-width-narrowing cast and the upper bits of the source
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* value leaked into any register-chained downstream use (the slot
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* store happens to mask via MOVB/MOVL of the dst width, so program
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* semantics looked right unless the result was consumed by a
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* register-chained outer cast / arithmetic).
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*
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* Surfaced by worker-stat during #10: when kstat.mode was first
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* typed as raw `u32`, `out.mode = k.mode` parsed as a u32→enum-u32
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* cast via `fs.mode`, and the cstage→wwstage asm divergence broke
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* 993_ww_ww + 995_self_rebuild on the first selfhost pass. The
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* workaround that was in tree (lib/os/os.ww kstat.mode: mode) has
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* already been retired by #25's single-site fix; #33 generalises
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* the gate.
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*
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* row | shape | gate
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* --------------------+--------------------------------------+----------
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* u32_to_enum_u32 | `let y: m = x: m;` with m=enum u32. | exit=7
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* | Identity (4B/unsigned). Both stages | + byte-id
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* | skip — no clamp. |
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* enum_u32_to_u32 | reverse: `let z: u32 = y: u32;`. | exit=7
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* | Also identity (4B/unsigned, walker | + byte-id
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* | now resolves `mymode` through |
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* | aliaslookup to u32). Both skip — |
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* | flips from #25's clamp-emit. |
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* u32_to_enum_u8 | dst is enum u8. Width narrows 4→1, | exit=7
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* | so identity is false. Both stages | + byte-id
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* | now emit ANDQ $0xFF — flips from |
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* | #25's skip. Fixes the silent leak |
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* | (see u32_to_enum_u8_truncate below). |
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* i64_to_enum_i32 | signed-narrow: dst is enum i32. | exit=7
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* | Width narrows 8→4 → identity false. | + byte-id
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* | Both stages emit MOVSXD AX, AX — |
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* | flips from #25's skip. Fixes the |
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* | silent leak (see |
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* | i64_to_enum_i32_truncate below). |
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* struct_field_rt | mirror of lib/os fillfilestat: a u32 | exit=7
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* | struct field copied into an enum-u32 | + byte-id
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* | field by chained N_DOT. Identity |
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* | (4B/unsigned). Both skip. |
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* u32_u32_identity | `let y: u32 = x: u32;` with src=u32. | exit=7
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* | Trivial identity. Both stages skip; | + byte-id
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* | pre-#33 they emitted a redundant |
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* | MOVL AX, AX. |
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* i32_i32_identity | same shape, src/dst i32. Pre-#33 | exit=7
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* | both emitted MOVSXD AX, AX. Now | + byte-id
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* | skip. |
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* u8_u8_identity | u8 → u8. Pre-#33 ANDQ $0xFF. Now | exit=7
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* | skip. | + byte-id
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* i8_i8_identity | i8 → i8. Pre-#33 MOVSBQ AX, AX. | exit=7
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* | Now skip. | + byte-id
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* u16_u16_identity | u16 → u16. Pre-#33 ANDQ $0xFFFF. | exit=7
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* | Now skip. | + byte-id
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* i16_i16_identity | i16 → i16. Pre-#33 MOVSWQ AX, AX. | exit=7
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* | Now skip. | + byte-id
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* u32_to_i32_signchg | width equal, signedness differs. | exit=7
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* | Identity is FALSE → narrow-clamp | + byte-id
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* | MUST fire. Both stages emit MOVSXD |
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* | (dst is signed-narrow). Pin against |
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* | future refactors that mis-broaden |
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* | the skip. |
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* u32_to_enum_u8_trnc | exit-code-validating silent- | exit=0
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* | miscompile fix. x=0xFFFFu32 cast to | + byte-id
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* | enum-u8, then to u32, then divided |
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* | by 0x100. Post-#33 the inner cast |
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* | clamps to 0xFF, divide yields 0; |
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* | pre-#33 the upper bits leaked |
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* | (AX=0xFFFF), divide yielded 0xFF. |
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* i64_to_enum_i32_trnc| same shape on i64 → enum-i32. | exit=0
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* | x=0x100000000i64 cast to enum-i32, | + byte-id
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* | then to i64, divided by 0x100000000. |
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* | Post-#33 MOVSXD takes low 32 bits |
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* | (0), divide yields 0; pre-#33 the |
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* | high 32 bits leaked, divide |
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* | yielded 1. |
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*
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* Cstage exit-code rows confirm the binary still runs correctly
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* post-#33. The asm-byte-id rows pin the symmetric-emit contract.
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* The `*_trnc` rows are the regression-pinning ones for the
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* silent-miscompile fix that #25's dst-kind-only skip left in
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* place. ww3!=ww4 byte-id (995_self_rebuild) covers a broader
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* surface but doesn't isolate this corner.
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*
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* Note: removing the defensive MOVL exposes any upstream cgen path
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* that leaves garbage in upper RAX when producing a sub-word value.
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* If a future test goes red post-#33, the contract is violated
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* somewhere — fix the upstream producer, do NOT reinstate the
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* defensive clamp.
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*/
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#include <stdio.h>
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#include <stdlib.h>
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#include <unistd.h>
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#include <sys/stat.h>
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#include <sys/wait.h>
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#include "wwtestpkg.h"
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static int
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runwait(const char *cmd)
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{
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int rc = system(cmd);
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if (rc == -1) return -1;
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if (WIFEXITED(rc)) return WEXITSTATUS(rc);
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return -1;
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}
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struct row { const char *label; const char *src; int want; };
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static const struct row rows[] = {
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/* 1. Headline #25 case: u32 → enum-u32. Pre-fix cstage emitted
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* `MOVL AX, AX` after the slot load; wwstage skipped. The cast
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* is a no-op at runtime so program semantics is unchanged
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* either way — exit code stays 7 regardless. The asm-byte-id
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* row is what catches the regression. */
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{ "u32_to_enum_u32",
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"type mymode = enum u32 { A = 1u32, B = 2u32 };\n"
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"fn main() i32 = {\n"
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"\tlet x: u32 = 7u32;\n"
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"\tlet y: mymode = x: mymode;\n"
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"\treturn (y: u32): i32;\n"
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"};\n",
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7 },
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/* 2. Reverse direction: enum-u32 → u32. Post-#33 both stages
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* walk `mymode` through aliaslookup to u32, see (src u32, dst
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* u32, both unsigned), and skip the narrow-clamp under the
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* identity-width identity-sign predicate. Flips from #25's
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* clamp-emit. Exit code unchanged at 7. */
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{ "enum_u32_to_u32",
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"type mymode = enum u32 { A = 1u32 };\n"
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"fn main() i32 = {\n"
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"\tlet y: mymode = 7u32: mymode;\n"
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"\tlet z: u32 = y: u32;\n"
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"\treturn z: i32;\n"
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"};\n",
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7 },
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/* 3. Different enum width: u32 → enum-u8. Post-#33 both stages
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* emit ANDQ $0xFF because identity is false (src 4B, dst 1B).
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* Flips from #25's dst-is-enum skip. The slot write masks via
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* MOVB so program semantics with `7` reads back as 7 either
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* way; the silent-miscompile case (upper bits leaking into
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* register-chained downstream use) is pinned by
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* u32_to_enum_u8_trnc below. */
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{ "u32_to_enum_u8",
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"type small = enum u8 { A = 1u8 };\n"
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"fn main() i32 = {\n"
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"\tlet x: u32 = 7u32;\n"
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"\tlet y: small = x: small;\n"
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"\treturn (y: u32): i32;\n"
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"};\n",
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7 },
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/* 4. Signed-narrow path: i64 → enum-i32. Post-#33 both stages
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* emit MOVSXD AX, AX (identity false: src 8B, dst 4B). Flips
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* from #25's skip. Slot is read with MOVSXD downstream so the
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* sign-extension is recovered on use; silent leak through a
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* register-chained outer cast is pinned by
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* i64_to_enum_i32_trnc below. */
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{ "i64_to_enum_i32",
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"type sflag = enum i32 { A = 1i32 };\n"
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"fn main() i32 = {\n"
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"\tlet x: i64 = 7i64;\n"
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"\tlet y: sflag = x: sflag;\n"
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"\treturn (y: i32);\n"
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"};\n",
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7 },
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/* 5. Mirror of lib/os fillfilestat: struct field of one type
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* copied into an enum-typed field of another struct via
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* chained N_DOT. Identity (4B/unsigned on both sides) → both
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* stages skip the clamp. Pre-#25 this blew up 993_ww_ww +
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* 995_self_rebuild on the first selfhost pass. */
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{ "struct_field_rt",
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"type mymode = enum u32 { A = 1u32 };\n"
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"type src = struct { mode: u32 };\n"
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"type dst = struct { mode: mymode };\n"
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"fn main() i32 = {\n"
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"\tlet a: src = src { mode = 7u32 };\n"
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"\tlet b: dst;\n"
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"\tb.mode = a.mode: mymode;\n"
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"\treturn (b.mode: u32): i32;\n"
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"};\n",
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7 },
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/* 6-11. Identity-width identity-sign rows. Pre-#33 the cast
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* always emitted a clamp for sub-8B dst (MOVL/ANDQ/MOVSBQ/
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* MOVSWQ/MOVSXD depending on width and signedness); post-#33
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* all six skip because src and dst share the underlying
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* primitive. Asm byte-id pins the contract. */
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{ "u32_u32_identity",
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"fn main() i32 = {\n"
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"\tlet x: u32 = 7u32;\n"
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"\tlet y: u32 = x: u32;\n"
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"\treturn y: i32;\n"
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"};\n",
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7 },
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{ "i32_i32_identity",
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"fn main() i32 = {\n"
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"\tlet x: i32 = 7i32;\n"
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"\tlet y: i32 = x: i32;\n"
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"\treturn y;\n"
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"};\n",
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7 },
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{ "u8_u8_identity",
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"fn main() i32 = {\n"
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"\tlet x: u8 = 7u8;\n"
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"\tlet y: u8 = x: u8;\n"
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"\treturn (y: u32): i32;\n"
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"};\n",
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7 },
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{ "i8_i8_identity",
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"fn main() i32 = {\n"
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"\tlet x: i8 = 7i8;\n"
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"\tlet y: i8 = x: i8;\n"
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"\treturn (y: i32);\n"
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"};\n",
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7 },
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{ "u16_u16_identity",
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"fn main() i32 = {\n"
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"\tlet x: u16 = 7u16;\n"
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"\tlet y: u16 = x: u16;\n"
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"\treturn (y: u32): i32;\n"
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"};\n",
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7 },
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{ "i16_i16_identity",
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"fn main() i32 = {\n"
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"\tlet x: i16 = 7i16;\n"
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"\tlet y: i16 = x: i16;\n"
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"\treturn (y: i32);\n"
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"};\n",
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7 },
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/* 12. Width-equal sign-change: u32 → i32. Identity is FALSE
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* (signedness differs) so the clamp MUST still emit (MOVSXD
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* because dst is signed-narrow). Asm byte-id pins this
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* against future refactors that mis-broaden the identity
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* skip. Exit code 7 is just the value round-tripping. */
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{ "u32_to_i32_signchg",
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"fn main() i32 = {\n"
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"\tlet x: u32 = 7u32;\n"
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"\tlet y: i32 = x: i32;\n"
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"\treturn y;\n"
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"};\n",
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7 },
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/* 13. Silent-miscompile fix, u32 → enum-u8. Pre-#33 the
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* b5632b1 dst-is-enum skip left the upper bits of the u32
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* source in AX. With register-chained downstream use (no slot
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* spill between the inner cast and the outer expression), the
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* leak survives. Probe: start with x=0xFFFFu32, cast to
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* enum-u8 (should clamp to 0xFF), cast to u32, divide by
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* 0x100. Post-#33 the inner clamp leaves AX=0xFF and the
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* divide yields 0; pre-#33 AX stayed 0xFFFF and the divide
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* yielded 0xFF. Exit code distinguishes (0 vs 255). */
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{ "u32_to_enum_u8_trnc",
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"type small = enum u8 { A = 1u8 };\n"
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"fn main() i32 = {\n"
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"\tlet x: u32 = 0xFFFFu32;\n"
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"\tlet r: u32 = ((x: small): u32) / 0x100u32;\n"
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"\treturn r: i32;\n"
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"};\n",
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0 },
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/* 14. Silent-miscompile fix, i64 → enum-i32. Same shape on
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* the signed-narrow path. x=0x100000000i64 (bit 32 set, low
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* 32 bits zero). Post-#33 the MOVSXD takes the low 32 bits
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* (0), AX=0, divide by 0x100000000 yields 0. Pre-#33 the
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* clamp was skipped, AX stayed 0x100000000, divide yielded
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* 1. Exit code distinguishes (0 vs 1). */
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{ "i64_to_enum_i32_trnc",
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"type sflag = enum i32 { A = 1i32 };\n"
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"fn main() i32 = {\n"
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"\tlet x: i64 = 0x100000000i64;\n"
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"\tlet r: i64 = ((x: sflag): i64) / 0x100000000i64;\n"
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"\treturn r: i32;\n"
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"};\n",
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0 },
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/* 15. Pseudo-field defensive-clamp pin. Source is `s.len`, a
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* str header pseudo-field — neither stage's source-type
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* resolver recognises it (cstage's `castsrcprim` gates the
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* N_DOT branch on `bu->kind == TY_STRUCT`; wwstage's
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* `exprprimresolved` routes through `dotfieldtnode` which
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* returns nil for non-struct base). Both fall back to sz=0,
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* identity is false, the narrow-clamp emits (MOVSXD here
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* because dst is signed-narrow i32). Pinning byte-id on this
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* row catches a future refactor that wires pseudo-field
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* inference asymmetrically into one stage — the kind of drift
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* that would silently break 995_self_rebuild without naming
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* the corner. Exit code 7 = round-trip of the literal len. */
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{ "pseudo_field_clamp",
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"fn main() i32 = {\n"
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"\tlet s: str = \"abcdefg\";\n"
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"\tlet n: i32 = s.len: i32;\n"
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"\treturn n;\n"
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"};\n",
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7 },
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/* 16. Bool source clamp pin. Source is a bool local, dst is i8.
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* Width matches (1B) but bool is excluded from the int-prim
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* contract on both stages (cstage's `type_isint(TY_BOOL)` is
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* false; wwstage's `typenodeprimresolved` has an explicit
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* `streq(nm, "bool") → return` early-out). So identity is
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* never true on a bool source: the narrow-clamp emits
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* (MOVSBQ AX, AX because dst is i8, signed-narrow). Without
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* the bool early-out in wwstage, `primsize("bool")=1` and
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* `typenameisunsigned("bool")=false` made wwstage see
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* (sz=1, unsigned=false) and fire identity on bool→i8 while
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* cstage emitted MOVSBQ — silent asm asymmetry that no other
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* row exercises. Mirrors the `*_trnc` rows' pattern: the row
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* pins the clamp emit, not just the exit code. */
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{ "bool_to_i8_clamp",
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"fn main() i32 = {\n"
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"\tlet b: bool = true;\n"
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"\tlet y: i8 = b: i8;\n"
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"\treturn (y: i32);\n"
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"};\n",
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1 },
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};
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static int
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run_driver(const char *driver, const struct row *r, int i)
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{
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char tmpdir[64], src[128], outbin[128], rmcmd[160], cmd[1024];
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snprintf(tmpdir, sizeof tmpdir, "/tmp/cem_%d_d_%d", getpid(), i);
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mkdir(tmpdir, 0755);
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snprintf(src, sizeof src, "%s/cem_%d_%d.ww", tmpdir, getpid(), i);
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snprintf(outbin, sizeof outbin, "%s/cem_%d_%d", tmpdir, getpid(), i);
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snprintf(rmcmd, sizeof rmcmd, "rm -rf %s", tmpdir);
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FILE *f = fopen(src, "wb");
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if (!f) { runwait(rmcmd); return -1; }
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wwtest_fputs(r->src, f);
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fclose(f);
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snprintf(cmd, sizeof cmd, "%s build -o %s %s 2>/dev/null",
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driver, outbin, src);
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if (runwait(cmd) != 0) {
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fprintf(stderr, "row[%s]: build via %s failed\n",
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r->label, driver);
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runwait(rmcmd);
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return -1;
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}
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int got = runwait(outbin);
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runwait(rmcmd);
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return got;
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}
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/* asm_byte_identical — generate .s via cstage's w6c and wwstage's
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* w6c_ww and diff. This is the regression-pinning row for #25; an
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* exit-code-only comparison wouldn't catch a redundant MOVL drift
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* because the program semantics is unchanged. */
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static int
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asm_byte_identical(const char *bin, const struct row *r, int i)
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{
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char src[64], cs[64], ws[64], cmd[1024];
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snprintf(src, sizeof src, "/tmp/cem_asm_%d_%d.ww", getpid(), i);
|
|
snprintf(cs, sizeof cs, "/tmp/cem_asm_%d_%d_c.s", getpid(), i);
|
|
snprintf(ws, sizeof ws, "/tmp/cem_asm_%d_%d_w.s", getpid(), i);
|
|
|
|
FILE *f = fopen(src, "wb");
|
|
if (!f) return -1;
|
|
wwtest_fputs(r->src, f);
|
|
fclose(f);
|
|
|
|
snprintf(cmd, sizeof cmd, "%s/w6c -o %s %s 2>/dev/null", bin, cs, src);
|
|
if (runwait(cmd) != 0) {
|
|
fprintf(stderr, "row[%s]: w6c errored\n", r->label);
|
|
unlink(src);
|
|
return -1;
|
|
}
|
|
snprintf(cmd, sizeof cmd, "%s/w6c_ww -o %s %s 2>/dev/null",
|
|
bin, ws, src);
|
|
if (runwait(cmd) != 0) {
|
|
fprintf(stderr, "row[%s]: w6c_ww errored\n", r->label);
|
|
unlink(src); unlink(cs);
|
|
return -1;
|
|
}
|
|
|
|
FILE *fc = fopen(cs, "rb");
|
|
FILE *fw = fopen(ws, "rb");
|
|
int rc = 0;
|
|
if (!fc || !fw) {
|
|
rc = -1;
|
|
} else {
|
|
for (;;) {
|
|
int a = fgetc(fc);
|
|
int b = fgetc(fw);
|
|
if (a != b) { rc = -1; break; }
|
|
if (a == EOF) break;
|
|
}
|
|
}
|
|
if (fc) fclose(fc);
|
|
if (fw) fclose(fw);
|
|
if (rc != 0)
|
|
fprintf(stderr, "row[%s]: cstage vs wwstage asm differs\n",
|
|
r->label);
|
|
unlink(src); unlink(cs); unlink(ws);
|
|
return rc;
|
|
}
|
|
|
|
int
|
|
main(void)
|
|
{
|
|
const char *bin = getenv("BIN");
|
|
if (!bin) bin = "out/bin";
|
|
char absbin[1024];
|
|
if (bin[0] != '/') {
|
|
char cwd[1024];
|
|
if (getcwd(cwd, sizeof cwd) == NULL) return 1;
|
|
snprintf(absbin, sizeof absbin, "%s/%s", cwd, bin);
|
|
bin = absbin;
|
|
}
|
|
|
|
char cdrv[1024];
|
|
snprintf(cdrv, sizeof cdrv, "%s/ww", bin);
|
|
char wdrv[1024];
|
|
snprintf(wdrv, sizeof wdrv, "%s/ww_ww", bin);
|
|
|
|
struct { const char *name; const char *path; int gated_on_existence; }
|
|
drivers[] = {
|
|
{ "cstage", cdrv, 0 },
|
|
{ "wwstage", wdrv, 1 },
|
|
{ NULL, NULL, 0 },
|
|
};
|
|
|
|
int n = (int)(sizeof rows / sizeof rows[0]);
|
|
int total = 0, fail = 0;
|
|
|
|
for (int d = 0; drivers[d].name; d++) {
|
|
if (drivers[d].gated_on_existence
|
|
&& access(drivers[d].path, X_OK) != 0) {
|
|
fprintf(stderr, "cast_enum_movl: skip %s (no %s)\n",
|
|
drivers[d].name, drivers[d].path);
|
|
continue;
|
|
}
|
|
for (int i = 0; i < n; i++) {
|
|
int got = run_driver(drivers[d].path, &rows[i], i);
|
|
total++;
|
|
if (got != rows[i].want) {
|
|
fprintf(stderr,
|
|
"cast_enum_movl[%s][%s]: exit=%d want=%d\n",
|
|
drivers[d].name, rows[i].label,
|
|
got, rows[i].want);
|
|
fail++;
|
|
}
|
|
}
|
|
}
|
|
|
|
/* Asm byte-identity diff, only when wwstage is built. This is
|
|
* the row that pins the #25 fix. */
|
|
if (access(wdrv, X_OK) == 0) {
|
|
for (int i = 0; i < n; i++) {
|
|
total++;
|
|
if (asm_byte_identical(bin, &rows[i], i) != 0)
|
|
fail++;
|
|
}
|
|
}
|
|
|
|
if (fail) {
|
|
fprintf(stderr,
|
|
"cast_enum_movl: %d/%d fixtures failed\n", fail, total);
|
|
return 1;
|
|
}
|
|
printf("cast_enum_movl: %d/%d ok\n", total, total);
|
|
return 0;
|
|
}
|