Hojun-Cho
8c15ab5145
719/724/744/746 -> test/asm/dataemit_test.ww. Exact DATAW payload needles, the produce-window zero-init and MOVQ-load count floors, and the strdef inline-pair want/anti windows preserved with their per-row byte-id legs.
341 lines
12 KiB
Plaintext
341 lines
12 KiB
Plaintext
package dataemit_test;
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// Direct-w6c asm-shape gate over data/def emission and let lowering.
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// Port of the retired native carriers test/wcc/719_signed_data_emit.c,
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// 724_letdecl_zeroinit.c, 744_letcopy_struct.c and
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// 746_strdef_inline.c; every assertion preserved. Runtime rows are
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// owned elsewhere (test/lang/{signed_data_emit,local_zeroinit,
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// void_error_singleton}_test.ww, test/wcc/data/r744_letcopy_*) — the
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// directive-shape needles, zero-init/copy windows and count floors
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// here are the unowned remainder; 744's load-count floor still
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// catches a both-stages-identical partial copy that runtime checks
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// and byte-id both miss.
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//
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// 719 (#19): the whole .s must carry the EXACT `DATAW <sym>(SB),
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// "<bytes>"` row — the payload rendered per emit_data_byte's
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// printable/escape contract (printable ASCII raw, else \xNN) — so a
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// future cgen refactor emitting the slot via a different directive
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// cannot slip past green semantics. Whole-file needle as in the C.
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//
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// 724 (STATUS-3 #22): the bare `let x: T;` 8B slot zero-init
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// `MOVQ $0, -` must appear inside [TEXT main.produce .. RET); the
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// byte-id leg is the actual #22 fix pin.
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//
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// 744 (STATUS-6 #32): `MOVQ\t-` source-slot load count floors
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// {1,3,4,4} over [TEXT main.produce .. next TEXT).
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//
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// 746 (#12): both str-def value-reference shapes must inline the
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// strlit pair (LEAQ <usemod>._S_ + MOVQ $39,) and never the bogus
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// `alpha.MSG(SB)` symbol load inside [TEXT sym .. RET). Per #49 the
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// strlit label carries the USE-site module's prefix.
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//
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// Byte-id legs ride every row as in the C. Dropped C machinery, not
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// assertions: w6c_ww-absent skip gates, getpid()-keyed /tmp names,
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// slurp caps. The `package main;` prefix reproduces wwtest_fputs
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// where the carrier injected it.
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import os;
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import os.exec;
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import strings;
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import testenv;
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import time;
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fn fail(label: str, why: str) void = {
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let m: str = strings.concat("dataemit FAIL: ", label, " -- ", why,
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"\n");
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os.write(2, m.ptr, m.len: u64);
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assert(false);
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};
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fn tmo() time.duration = {
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return (180i64 * (time.second: i64)): time.duration;
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};
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fn emitstage(td: str, label: str, stage: str, drv: str,
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outname: str) void = {
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let av: []str = [];
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append(av, drv);
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append(av, "-o");
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append(av, outname);
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append(av, "src.ww");
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let co: testenv.commandout;
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testenv.runcommand(td, td, stage, av, tmo(), &co);
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let ok: bool = co.termination == exec.termination.EXIT && co.code == 0;
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if (!ok) { fail(label, strings.concat(stage, " compile failed")); };
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};
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// [first `sym` .. first `retneedle` after it), widened to EOF when
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// retneedle is missing and mustret == 0.
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fn asmwindow(label: str, stage: str, s: str, sym: str, retneedle: str,
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mustret: i32) str = {
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let fp: i32 = testenv.pos(s, sym);
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if (fp < 0) {
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fail(label, strings.concat(stage, ": no ", sym, " in .s"));
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};
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let tail: str = strings.sub(s, fp, s.len);
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let rp: i32 = testenv.pos(tail, retneedle);
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if (rp < 0) {
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if (mustret != 0) {
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fail(label, strings.concat(stage, ": no RET inside ",
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sym));
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};
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return tail;
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};
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return strings.sub(tail, 0, rp);
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};
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// One 719 row: exact DATAW payload needle in both stages' .s, then
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// byte-id.
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fn datawrow(label: str, src: str, sym: str, bytes: str) void = {
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let td: str = testenv.fresh();
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testenv.writefile(strings.concat(td, "/src.ww"), src);
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emitstage(td, label, "cstage", testenv.driver("w6c"), "cs.s");
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emitstage(td, label, "wwstage", testenv.driver("w6c_ww"), "ws.s");
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let cs: str = testenv.readfile(strings.concat(td, "/cs.s"));
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let ws: str = testenv.readfile(strings.concat(td, "/ws.s"));
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let needle: str = strings.concat("DATAW ", sym, "(SB),\"", bytes,
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"\"");
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if (!testenv.has(cs, needle)) {
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fail(label, strings.concat("cstage: ", needle, " missing"));
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};
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if (!testenv.has(ws, needle)) {
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fail(label, strings.concat("wwstage: ", needle, " missing"));
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};
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if (!testenv.same(cs, ws)) {
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fail(label, "cstage vs wwstage asm differs");
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};
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testenv.clean(td);
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};
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// 719: two's-complement little-endian payloads at the declared
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// element width; 100 == 'd' and 56 == '8' stay raw per
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// emit_data_byte's printable arm.
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@test fn signeddataemit() void = {
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datawrow("i8_neg", strings.concat(
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"package main;\n",
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"let x: i8 = -1i8;\n",
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"fn main() i32 = { return 0; };\n"),
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"main.x", "\\xff\\xff\\xff\\xff\\xff\\xff\\xff\\xff");
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datawrow("i16_neg", strings.concat(
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"package main;\n",
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"let x: i16 = -2i16;\n",
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"fn main() i32 = { return 0; };\n"),
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"main.x", "\\xfe\\xff\\xff\\xff\\xff\\xff\\xff\\xff");
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datawrow("i32_neg", strings.concat(
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"package main;\n",
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"let x: i32 = -100i32;\n",
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"fn main() i32 = { return 0; };\n"),
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"main.x", "\\x9c\\xff\\xff\\xff\\xff\\xff\\xff\\xff");
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datawrow("i64_neg", strings.concat(
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"package main;\n",
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"let x: i64 = -1000i64;\n",
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"fn main() i32 = { return 0; };\n"),
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"main.x", "\\x18\\xfc\\xff\\xff\\xff\\xff\\xff\\xff");
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datawrow("i8_arr", strings.concat(
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"package main;\n",
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"let a: [4]i8 = [1i8, -2i8, 3i8, -4i8];\n",
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"fn main() i32 = { return 0; };\n"),
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"main.a", "\\x01\\xfe\\x03\\xfc");
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datawrow("i16_arr", strings.concat(
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"package main;\n",
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"let a: [4]i16 = [1i16, -2i16, 3i16, -4i16];\n",
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"fn main() i32 = { return 0; };\n"),
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"main.a", "\\x01\\x00\\xfe\\xff\\x03\\x00\\xfc\\xff");
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datawrow("i32_arr", strings.concat(
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"package main;\n",
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"let a: [3]i32 = [10i32, -20i32, 30i32];\n",
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"fn main() i32 = { return 0; };\n"),
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"main.a",
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"\\x0a\\x00\\x00\\x00\\xec\\xff\\xff\\xff\\x1e\\x00\\x00\\x00");
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datawrow("i64_arr", strings.concat(
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"package main;\n",
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"let a: [2]i64 = [100i64, -200i64];\n",
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"fn main() i32 = { return 0; };\n"),
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"main.a", strings.concat(
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"d\\x00\\x00\\x00\\x00\\x00\\x00\\x00",
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"8\\xff\\xff\\xff\\xff\\xff\\xff\\xff"));
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};
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// One 724 row: zero-init store inside the produce window on both
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// stages, then the #22 fix-pin byte-id.
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fn zeroinitrow(label: str, src: str) void = {
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let td: str = testenv.fresh();
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testenv.writefile(strings.concat(td, "/src.ww"), src);
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emitstage(td, label, "cstage", testenv.driver("w6c"), "cs.s");
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emitstage(td, label, "wwstage", testenv.driver("w6c_ww"), "ws.s");
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let cs: str = testenv.readfile(strings.concat(td, "/cs.s"));
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let ws: str = testenv.readfile(strings.concat(td, "/ws.s"));
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let cw: str = asmwindow(label, "cstage", cs, "TEXT main.produce",
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"RET", 0);
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let ww: str = asmwindow(label, "wwstage", ws, "TEXT main.produce",
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"RET", 0);
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if (!testenv.has(cw, "MOVQ\t$0, -")) {
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fail(label,
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"cstage: no `MOVQ $0, -K(BP)` zero-init in produce body");
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};
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if (!testenv.has(ww, "MOVQ\t$0, -")) {
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fail(label,
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"wwstage: no `MOVQ $0, -K(BP)` zero-init in produce body");
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};
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if (!testenv.same(cs, ws)) {
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fail(label, "cstage vs wwstage asm differs");
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};
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testenv.clean(td);
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};
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@test fn letdeclzeroinit() void = {
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// The utf8.invalid shape.
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zeroinitrow("bang_void_letdecl", strings.concat(
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"package main;\n",
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"type invalid = !void;\n",
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"export fn produce() (i32 | invalid) = {\n",
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" let e: invalid;\n",
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" return e;\n",
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"};\n"));
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// The utf8.done / utf8.more shape.
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zeroinitrow("void_alias_letdecl", strings.concat(
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"package main;\n",
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"type done = void;\n",
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"export fn produce() (i32 | done) = {\n",
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" let d: done;\n",
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" return d;\n",
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"};\n"));
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};
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// One 744 row: `MOVQ\t-` load-count floor over [TEXT main.produce ..
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// next TEXT) on both stages, then byte-id.
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fn letcopyrow(label: str, src: str, minloads: i32) void = {
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let td: str = testenv.fresh();
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testenv.writefile(strings.concat(td, "/src.ww"), src);
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emitstage(td, label, "cstage", testenv.driver("w6c"), "cs.s");
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emitstage(td, label, "wwstage", testenv.driver("w6c_ww"), "ws.s");
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let cs: str = testenv.readfile(strings.concat(td, "/cs.s"));
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let ws: str = testenv.readfile(strings.concat(td, "/ws.s"));
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letcopycheck(label, "cstage", cs, minloads);
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letcopycheck(label, "wwstage", ws, minloads);
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if (!testenv.same(cs, ws)) {
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fail(label, "cstage vs wwstage asm differs");
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};
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testenv.clean(td);
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};
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fn letcopycheck(label: str, stage: str, s: str, minloads: i32) void = {
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let bp: i32 = testenv.pos(s, "TEXT main.produce");
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if (bp < 0) {
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fail(label, strings.concat(stage,
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": no TEXT produce label in .s"));
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};
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let tail: str = strings.sub(s, bp, s.len);
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let ep: i32 = testenv.pos(strings.sub(tail, 1, tail.len),
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"\nTEXT ");
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let w: str = tail;
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if (ep >= 0) { w = strings.sub(tail, 0, 1 + ep); };
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if (testenv.occurrences(w, "MOVQ\t-") < minloads) {
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fail(label, strings.concat(stage,
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": too few `MOVQ -K(BP), AX` source loads in produce ",
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"(copy missing)"));
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};
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};
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// 744 shapes per the #32 brief: p1 structlit-inits where a bare decl
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// would hit the pre-existing #15/#26c non-8-multiple zero-init
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// divergence; the tagged row checks only p2.a for the same reason.
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@test fn letcopystruct() void = {
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letcopyrow("tri_i32", strings.concat(
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"package main;\n",
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"type tri = struct { a: i32, b: i32, c: i32 };\n",
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"export fn produce() i32 = {\n",
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" let p1: tri = tri{a=11, b=22, c=33};\n",
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" let p2: tri = p1;\n",
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" if (p2.a != 11) { return 11; };\n",
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" if (p2.b != 22) { return 12; };\n",
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" if (p2.c != 33) { return 13; };\n",
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" return 0;\n",
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"};\n"), 1);
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letcopyrow("field_str", strings.concat(
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"package main;\n",
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"type ws = struct { a: i32, s: str };\n",
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"export fn produce() i32 = {\n",
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" let p1: ws;\n",
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" p1.a = 7; p1.s = \"hi\";\n",
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" let p2: ws = p1;\n",
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" if (p2.a != 7) { return 11; };\n",
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" if (p2.s.len != 2) { return 12; };\n",
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" return 0;\n",
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"};\n"), 3);
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letcopyrow("field_slice", strings.concat(
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"package main;\n",
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"type wsl = struct { a: i32, b: []u8 };\n",
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"export fn produce() i32 = {\n",
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" let raw: [3]u8 = [1: u8, 2: u8, 3: u8];\n",
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" let p1: wsl;\n",
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" p1.a = 9; p1.b = raw[0:3];\n",
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" let p2: wsl = p1;\n",
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" if (p2.a != 9) { return 11; };\n",
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" if (p2.b.len != 3) { return 12; };\n",
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" return 0;\n",
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"};\n"), 4);
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letcopyrow("field_tagged", strings.concat(
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"package main;\n",
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"type tag = (i32 | str);\n",
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"type wtg = struct { a: i32, t: tag };\n",
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"export fn produce() i32 = {\n",
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" let p1: wtg = wtg{a=5, t=42: tag};\n",
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" let p2: wtg = p1;\n",
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" if (p2.a != 5) { return 11; };\n",
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" return 0;\n",
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"};\n"), 4);
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};
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// One 746 row: strlit-inline pair present, bogus SB symbol load
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// absent, inside [TEXT sym .. RET) on both stages, then byte-id.
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fn strdefrow(label: str, src: str, sym: str, wantlea: str,
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bad: str) void = {
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let td: str = testenv.fresh();
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testenv.writefile(strings.concat(td, "/src.ww"), src);
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emitstage(td, label, "cstage", testenv.driver("w6c"), "cs.s");
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emitstage(td, label, "wwstage", testenv.driver("w6c_ww"), "ws.s");
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let cs: str = testenv.readfile(strings.concat(td, "/cs.s"));
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let ws: str = testenv.readfile(strings.concat(td, "/ws.s"));
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strdefcheck(label, "cstage", cs, sym, wantlea, bad);
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strdefcheck(label, "wwstage", ws, sym, wantlea, bad);
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if (!testenv.same(cs, ws)) {
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fail(label, "cstage vs wwstage asm differs");
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};
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testenv.clean(td);
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};
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fn strdefcheck(label: str, stage: str, s: str, sym: str, wantlea: str,
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bad: str) void = {
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let w: str = asmwindow(label, stage, s, sym, "\tRET", 1);
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if (!testenv.has(w, wantlea)) {
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fail(label, strings.concat(stage, ": want_lea ", wantlea,
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" missing inside ", sym));
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};
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if (!testenv.has(w, "MOVQ\t$39,")) {
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fail(label, strings.concat(stage,
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": want_len MOVQ $39, missing inside ", sym));
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};
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if (testenv.has(w, bad)) {
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fail(label, strings.concat(stage, ": bogus ", bad,
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" symbol load inside ", sym));
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};
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};
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@test fn strdefinline() void = {
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strdefrow("bare_ident_strdef", strings.concat(
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"package alpha;\n",
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"def MSG: str = \"strdef_inline_pin_aaaaaaaaaaaaaaa_43chr\";\n",
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"export fn afn() str = { return MSG; };\n",
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"export fn main() i32 = { return 0; };\n"),
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"TEXT alpha.afn", "LEAQ\talpha._S_", "alpha.MSG(SB)");
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strdefrow("mod_qualified_strdef", strings.concat(
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"package alpha;\n",
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"def MSG: str = \"strdef_inline_pin_aaaaaaaaaaaaaaa_43chr\";\n",
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"package beta;\n",
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"import alpha;\n",
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"export fn bfn() str = { return alpha.MSG; };\n",
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"export fn main() i32 = { return 0; };\n"),
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"TEXT beta.bfn", "LEAQ\tbeta._S_", "alpha.MSG(SB)");
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};
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