Hojun-Cho
9f76e816d7
relocate() reloc-kind ladder -> switch(k): PC32+PLT32 share a byte-identical body (comma-case), R_X86_64_64 absolute, default = unsupported-reloc errs+=1. loadso() vidx ladder -> switch(vidx): LOCAL not-exported, GLOBAL+BASE(1) unversioned (comma-case), default = verdef name lookup. Regenerated w6l/main.combined.ww.
132 lines
3.3 KiB
Plaintext
132 lines
3.3 KiB
Plaintext
// selfhost/cmd/w6l/pass.ww — port of cmd/w6l/pass.c.
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//
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// Resolution + relocation. l_resolve flags every undefined symbol
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// referenced by a relocation, and promotes those provided by some
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// loaded .so to "dynamic" with a freshly-assigned PLT slot.
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// l_relocate walks the rel list and patches the .text bytes in place
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// once the final virtual base is known. Dynamic refs are deferred:
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// their site is patched later in dynout, once the PLT vaddr is known.
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//
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// Supported relocation kinds: PC32 (=2), PLT32 (=4); both are 32-bit
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// PC-relative displacements (PLT32 == PC32 for static).
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package w6l;
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import os;
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import sym;
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import dyn;
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def R_X86_64_64: i32 = 1;
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def R_X86_64_PC32: i32 = 2;
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def R_X86_64_PLT32: i32 = 4;
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export fn resolve(l: *lnk) i32 = {
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// Initialise dynamic-linking sentinels. alloc(T{})! zeroes, so
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// isdyn/dynlib start clean — but pltidx and dynsymidx
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// must be -1, not 0.
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let si: *lsym = l.syms;
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for (si != nil) {
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si.pltidx = -1;
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si.dynsymidx = -1;
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si = si.snext;
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};
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// Promote each undefined sym that some lso exports to dynamic
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// and hand it a PLT slot. Iteration order over the relocation
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// list determines slot numbering and is stable across runs.
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let r: *lrel = l.rels;
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for (r != nil) {
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if (r.sym != nil) {
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if (r.sym.defined == 0) {
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if (r.sym.isdyn == 0) {
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let so: *lso = l.sos;
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for (so != nil) {
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if (soprovides(so, r.sym.name) != 0) {
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r.sym.isdyn = 1;
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r.sym.dynlib = so;
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r.sym.pltidx = l.dynn;
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l.dynn += 1;
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so = nil; // break
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} else {
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so = so.sonext;
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};
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};
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};
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};
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};
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r = r.rnext;
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};
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// What remains undefined truly is undefined.
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let r2: *lrel = l.rels;
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for (r2 != nil) {
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if (r2.sym != nil) {
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if (r2.sym.defined == 0) {
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if (r2.sym.isdyn == 0) {
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os.write(2, "w6l: undefined reference to '".ptr, 28u64);
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let nm: str = r2.sym.name;
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os.write(2, nm.ptr, nm.len: u64);
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os.write(2, "'\n".ptr, 2u64);
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l.errs += 1;
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};
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};
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};
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r2 = r2.rnext;
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};
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return l.errs;
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};
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fn patchu32(p: *u8, v: u32) void = {
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p[0] = (v & 255u32): u8;
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p[1] = ((v >> 8u32) & 255u32): u8;
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p[2] = ((v >> 16u32) & 255u32): u8;
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p[3] = ((v >> 24u32) & 255u32): u8;
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};
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fn patchu64(p: *u8, v: u64) void = {
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let i: i32 = 0;
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for (i < 8) {
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p[i] = ((v >> (i: u64 * 8u64)) & 255u64): u8;
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i += 1;
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};
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};
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export fn relocate(l: *lnk, textva: u64, datava: u64) i32 = {
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let r: *lrel = l.rels;
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for (r != nil) {
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if (r.sym != nil) {
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// Dynamic refs are patched later in dynout once the
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// PLT vaddr is known.
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if (r.sym.isdyn != 0) {
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r = r.rnext;
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continue;
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};
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if (r.sym.defined != 0) {
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let symva: u64 = textva + r.sym.val;
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if (r.sym.indata != 0) { symva = datava + r.sym.val; };
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let k: i32 = r.kind;
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switch (k) {
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case R_X86_64_PC32,R_X86_64_PLT32:
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let site: u64 = textva + r.off;
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let rel: i64 = (symva: i64 - site: i64) + r.addend;
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patchu32(l.text + r.off, rel: u32);
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case R_X86_64_64:
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// Absolute 64-bit. Currently used only
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// for DATAR slots in .data.
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let v: u64 = (symva: i64 + r.addend): u64;
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if (r.section == 1) {
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patchu64(l.data + r.off, v);
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} else {
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patchu64(l.text + r.off, v);
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};
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case:
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os.write(2, "w6l: unsupported reloc kind\n".ptr, 27u64);
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l.errs += 1;
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};
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};
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};
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r = r.rnext;
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};
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return l.errs;
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};
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