Plan 9-style w-prefix on the per-arch tools, disambiguating from the
real Plan 9 6c/6a/6l in ref/plan9front/:
cmd/wwc/ → cmd/wcc/ libwwc.a → libwcc.a
cmd/6{c,a,l} → cmd/w6{c,a,l} binary names too
test/wwc/ → test/wcc/ 6 test files w/ w6 prefix
selfhost/cmd mirror in lockstep
bootstrap/amd64/{w6c,w6a,w6l} snapshot binaries (gitignored)
WW_6{C,A,L} → WW_W6{C,A,L} env-var overrides
Plan 9 source-tree refs ("Plan 9 6c shape", ref/plan9front/, etc.)
preserved. Hare-style driver, both C and ww sides:
ww test [path] discover *_test.ww in a directory module, run
each; single-file mode for `ww test foo.ww`
Module-by-name `ww build foo` resolves to foo.ww or foo/foo.ww
via search path (cwd : -I dirs : $WW_LIB)
Default-to-cwd `ww build` / `ww test` build the cwd module
Run pass-through `ww run path arg1 arg2` reaches the program
lib/os: getcwd (79) and getdents64 (217) syscalls power `.` resolution
and directory enumeration on the ww side.
Makefile: wwstage tool deps now include lib/os/os.ww (+ lib/strconv
for wwdump_ww) so lib/* edits force their rebuild instead of leaving
stale binaries — surfaced when test 995 first failed against a stale
w6c_ww built before the lib/os additions.
Test 993 byte-identical parity gate (C-side ww vs ww-side ww_ww on a
build corpus) stays green; all 19 tests pass.
108 lines
2.1 KiB
C
108 lines
2.1 KiB
C
/*
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* 6.out.h — amd64 instruction enum + register names. Mirrors the
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* Plan 9 6c shape (cmd/6c/6.out.h) but trimmed to the subset that
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* w6c emits and w6a consumes in this bootstrap. Each new opcode added
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* here must also gain encoding support in cmd/w6a/asm.c.
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*/
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#ifndef SIX_OUT_H
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#define SIX_OUT_H
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/* registers — Plan 9 names; lowercase = 8-bit, etc. We use 64-bit. */
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enum {
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D_NONE = 0,
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/* general purpose 64-bit */
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D_AX, D_CX, D_DX, D_BX,
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D_SP, D_BP, D_SI, D_DI,
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D_R8, D_R9, D_R10, D_R11,
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D_R12, D_R13, D_R14, D_R15,
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/* SSE/XMM 64-bit float regs */
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D_X0, D_X1, D_X2, D_X3,
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D_X4, D_X5, D_X6, D_X7,
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D_X8, D_X9, D_X10, D_X11,
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D_X12, D_X13, D_X14, D_X15,
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/* pseudo regs (Plan 9) */
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D_PSP, /* SP pseudo (frame-relative) */
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D_PFP, /* FP pseudo (incoming args) */
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D_PSB, /* SB pseudo (static base) */
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/* operand kinds; not registers but share the slot */
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D_CONST, /* $N immediate */
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D_BRANCH, /* label reference */
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D_EXTERN, /* external symbol */
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D_INDIR /* offset(reg) memory */
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};
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/* opcodes — the small set we currently emit & encode */
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enum {
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A_NOP = 0,
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A_TEXT,
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A_DATA,
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A_GLOBL,
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A_END,
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A_MOVQ,
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A_MOVL,
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A_MOVB,
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A_MOVZBQ, /* movzx r64, r/m8 — load byte zero-extended */
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A_MOVSXD, /* movsxd r64, r/m32 — load i32 sign-extended */
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/* SSE2 scalar double-precision float */
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A_MOVSD, /* xmm/m → xmm and xmm → m */
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A_ADDSD,
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A_SUBSD,
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A_MULSD,
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A_DIVSD,
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A_UCOMISD,
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A_CVTTSD2SI, /* truncate f64 → i64 */
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A_CVTSI2SD, /* convert i64 → f64 */
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/* SSE scalar single-precision float (f32). Same xmm regs. */
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A_MOVSS,
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A_ADDSS,
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A_SUBSS,
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A_MULSS,
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A_DIVSS,
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A_UCOMISS,
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A_CVTTSS2SI,
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A_CVTSI2SS,
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A_CVTSD2SS, /* f64 → f32 truncate */
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A_CVTSS2SD, /* f32 → f64 widen */
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A_ADDQ,
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A_SUBQ,
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A_IMULQ,
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A_IDIVQ,
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A_DIVQ, /* unsigned 64-bit divide; sibling of IDIVQ */
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A_NEGQ,
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A_NOTQ,
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A_ANDQ,
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A_ORQ,
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A_XORQ,
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A_SHLQ,
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A_SHRQ,
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A_CMPQ,
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A_PUSHQ,
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A_POPQ,
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A_LEAQ,
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A_CALL,
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A_RET,
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A_JMP,
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A_JE, A_JNE,
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A_JL, A_JLE, A_JG, A_JGE,
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A_JB, A_JBE, A_JA, A_JAE,
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A_JZ, A_JNZ,
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A_SYSCALL,
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A_LAST
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};
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const char *anames(int); /* opcode -> mnemonic */
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const char *rnames(int); /* register -> name */
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#endif
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