// Module-level `def`/`let` f64/f32 literal (incl negation)
// emits DATA, read back from a fn. Migrated from test/wcc/917_def_float_lit_run.c
// (#129 Phase A.1). Pre-fix `def K: f64 = lit;` fell through emit_defs's int-only
// fold gate so no DATAW landed (link: `undefined reference to main.K`); emit_lets's
// float arm never peeled N_UN(MINUS/PLUS, N_FLOATLIT) so `let g: f64 = -1.5;`
// silently zero-emitted. Fix = shared emit_floatlit_data helper (negation via
// IEEE-754 sign-bit XOR). cstage build+run was T1; cs==ww .s byte-id rides T2
// (test-lang-byteid).
//
// drew: assert BIT-EXACT incl sign — the bits()-reinterpret reads the full IEEE
// pattern, so a sign-bit or mantissa drift fails (a truncating `: i32` read would
// alias 1.5 and 1.9). The negative rows pin the sign-XOR byte path.

package def_float_lit_test;

def KDPOS: f64 = 1.5;
def KDNEG: f64 = -1.5;
def KFPOS: f32 = 1.5f32;
def KFNEG: f32 = -1.5f32;
let GDNEG: f64 = -1.5;
let GDPOS: f64 = 1.5;
let GFPOS: f32 = 1.5f32;

fn bits64(v: f64) u64 = {
	let x: f64 = v;
	let p: *u64 = (&x): *u64;
	return *p;
};

fn bits32(v: f32) u32 = {
	let x: f32 = v;
	let p: *u32 = (&x): *u32;
	return *p;
};

@test fn def_f64_pos() void = {
	assert(bits64(KDPOS) == 0x3FF8000000000000u64);
};

@test fn def_f64_neg() void = {
	assert(bits64(KDNEG) == 0xBFF8000000000000u64);
};

@test fn def_f32_pos() void = {
	assert(bits32(KFPOS) == 0x3FC00000u32);
};

@test fn def_f32_neg() void = {
	assert(bits32(KFNEG) == 0xBFC00000u32);
};

@test fn let_f64_neg() void = {
	assert(bits64(GDNEG) == 0xBFF8000000000000u64);
};

@test fn let_f64_pos() void = {
	assert(bits64(GDPOS) == 0x3FF8000000000000u64);
};

@test fn let_f32_pos() void = {
	assert(bits32(GFPOS) == 0x3FC00000u32);
};