/* * 824_inferred_float_global — an inferred-type (annotation-less) module-global * `let pi = 3.5;` whose init is a FLOAT literal must load as a float (MOVSD) * at every downstream read, exactly as the explicit-typed `let pi: f64 = 3.5` * does. WWSTAGE-ONLY bug (cstage already correct post-#150-B / #18). * * Root (selfhost/cmd/wcc/cgen.ww): the checker backfills the inferred decl's * type annotation to the literal's type node `untyped_float` (check.ww * checkletassign). letemitsize keys global slot-sizing on letscalarprim / * letfloatprim, NEITHER of which recognises `untyped_float` → returns 0 → the * global is DROPPED from collectlets: no DATAW slot emitted, and every read * falls through cgident's `isletvar` guard to the silent bare return, leaving * X0 holding a stale spilled value. `let pi = 3.5; (pi * 2.0): int` then * computed 2.0*2.0 = 4, not 7 — silent, no diagnostic. * * defaultinferredlets already type_defaults an inferred-INT global's * `untyped_int` annotation to the machine word `int`; its comment explicitly * carved the float twin out and deferred it to #135, because cstage USED to * integer-type an inferred float at the use site (MOVQ) so defaulting ww-side * alone would diverge (cs≠ww, rule-10). #150-B fixed cstage to type_default * `untyped_float` → f64 and load MOVSD, so the divergence is gone: this commit * flips the carve-out (default `untyped_float` → f64, peeling one unary +/- as * the int arm does) and adds a name-keyword fallback to cgident's let-float * gate (the renamed `f64`/`f32` N_TNAME carries no stamped tinfo cgen can read, * so isfloattype's stamp-read misses it; letfloatprim on the keyword fires). * wwstage now emits the IDENTICAL `LEAQ main.pi(SB); MOVSD (CX), X0` as cstage. * * row | shape | want * ------------+---------------------------------------------+----- * infer_mul | let pi = 3.5; (pi * 2.0): int (the bug) | 7 * infer_read | let r = 2.5; (r + 0.5): int | 3 * infer_neg | let g = -2.5; (g * -2.0): int (unary peel) | 5 * infer_f32 | let q = 1.5f32; (q + 1.5f32): int (MOVSS) | 3 * ctrl_expl | let e: f64 = 3.5; (e * 2.0): int (explicit) | 7 * ctrl_int | let n = 5; (n + 1): int (int stays MOVQ) | 6 * * Pre-fix the infer_* rows ran wwstage=garbage (stale X0 / dropped global) and * cstage=correct (cs≠ww); post-fix all six are byte-identical between stages. * ctrl_int guards that the inferred-INT default (untyped_int → int, MOVQ) is * untouched; ctrl_expl guards the explicit-f64 path didn't regress. */ #include #include #include #include #include static int runwait(const char *cmd) { int rc = system(cmd); if (rc == -1) return -1; if (WIFEXITED(rc)) return WEXITSTATUS(rc); return -1; } struct row { const char *label; const char *src; int want; }; static const struct row rows[] = { /* infer_mul — the bug: inferred float global read in a float binop, * cast to int. Pre-fix wwstage dropped main.pi (no DATAW) and left X0 * stale → 2.0*2.0 = 4; cstage 7. */ { "infer_mul", "package main;\n" "let pi = 3.5;\n" "export fn main() i32 = {\n" "\treturn (pi * 2.0): i32;\n" "};\n", 7 }, /* infer_read — second inferred-float read shape (+, not *). */ { "infer_read", "package main;\n" "let r = 2.5;\n" "export fn main() i32 = {\n" "\treturn (r + 0.5): i32;\n" "};\n", 3 }, /* infer_neg — inferred float global with a unary-minus init; exercises * defaultinferredlets' single-unary peel (mirror of the int arm). */ { "infer_neg", "package main;\n" "let g = -2.5;\n" "export fn main() i32 = {\n" "\treturn (g * -2.0): i32;\n" "};\n", 5 }, /* infer_f32 — a bare f32-suffixed literal infers f32; the float load * must pick MOVSS, not MOVSD. (f32 already worked via letfloatprim's * "f32"; row guards the suffix-inferred path stays MOVSS.) */ { "infer_f32", "package main;\n" "let q = 1.5f32;\n" "export fn main() i32 = {\n" "\treturn (q + 1.5f32): i32;\n" "};\n", 3 }, /* ctrl_expl — explicit f64 annotation; already worked (lv.tnode is the * non-nil f64 node). No-regress guard. */ { "ctrl_expl", "package main;\n" "let e: f64 = 3.5;\n" "export fn main() i32 = {\n" "\treturn (e * 2.0): i32;\n" "};\n", 7 }, /* ctrl_int — inferred INT global. defaultinferredlets defaults it to * `int` (MOVQ scalar load); the float arm must NOT pull it into MOVSD. * No-regress guard for the int path. */ { "ctrl_int", "package main;\n" "let n = 5;\n" "export fn main() i32 = {\n" "\treturn (n + 1): i32;\n" "};\n", 6 }, }; static int run_driver(const char *driver, const struct row *r, int i) { char src[128], tmpdir[64], outbin[128], rmcmd[160], cmd[1024]; snprintf(tmpdir, sizeof tmpdir, "/tmp/ifg_%d_d_%d", getpid(), i); mkdir(tmpdir, 0755); snprintf(src, sizeof src, "%s/ifg_%d_%d.ww", tmpdir, getpid(), i); snprintf(outbin, sizeof outbin, "%s/ifg_%d_%d", tmpdir, getpid(), i); snprintf(rmcmd, sizeof rmcmd, "rm -rf %s", tmpdir); FILE *f = fopen(src, "wb"); if (!f) { runwait(rmcmd); return -1; } fputs(r->src, f); fclose(f); snprintf(cmd, sizeof cmd, "%s build -o %s %s 2>/dev/null", driver, outbin, src); if (runwait(cmd) != 0) { fprintf(stderr, "row[%s]: build via %s failed\n", r->label, driver); runwait(rmcmd); return -1; } int got = runwait(outbin); runwait(rmcmd); return got; } /* asm_byte_identical — w6c vs w6c_ww .s for the same source must match. */ static int asm_byte_identical(const char *bin, const struct row *r, int i) { char src[64], cs[64], ws[64], cmd[1024]; snprintf(src, sizeof src, "/tmp/ifg_asm_%d_%d.ww", getpid(), i); snprintf(cs, sizeof cs, "/tmp/ifg_asm_%d_%d_c.s", getpid(), i); snprintf(ws, sizeof ws, "/tmp/ifg_asm_%d_%d_w.s", getpid(), i); FILE *f = fopen(src, "wb"); if (!f) return -1; fputs(r->src, f); fclose(f); snprintf(cmd, sizeof cmd, "%s/w6c -o %s %s 2>/dev/null", bin, cs, src); if (runwait(cmd) != 0) { fprintf(stderr, "row[%s]: w6c errored\n", r->label); unlink(src); return -1; } snprintf(cmd, sizeof cmd, "%s/w6c_ww -o %s %s 2>/dev/null", bin, ws, src); if (runwait(cmd) != 0) { fprintf(stderr, "row[%s]: w6c_ww errored\n", r->label); unlink(src); unlink(cs); return -1; } FILE *fc = fopen(cs, "rb"); FILE *fw = fopen(ws, "rb"); int rc = 0; if (!fc || !fw) { rc = -1; } else { for (;;) { int a = fgetc(fc); int b = fgetc(fw); if (a != b) { rc = -1; break; } if (a == EOF) break; } } if (fc) fclose(fc); if (fw) fclose(fw); if (rc != 0) fprintf(stderr, "row[%s]: cstage vs wwstage asm differs\n", r->label); unlink(src); unlink(cs); unlink(ws); return rc; } int main(void) { const char *bin = getenv("BIN"); if (!bin) bin = "out/bin"; char absbin[1024]; if (bin[0] != '/') { char cwd[1024]; if (getcwd(cwd, sizeof cwd) == NULL) return 1; snprintf(absbin, sizeof absbin, "%s/%s", cwd, bin); bin = absbin; } char cdrv[1024]; snprintf(cdrv, sizeof cdrv, "%s/ww", bin); char wdrv[1024]; snprintf(wdrv, sizeof wdrv, "%s/ww_ww", bin); struct { const char *name; const char *path; int gated_on_existence; } drivers[] = { { "cstage", cdrv, 0 }, { "wwstage", wdrv, 1 }, { NULL, NULL, 0 }, }; int n = (int)(sizeof rows / sizeof rows[0]); int total = 0, fail = 0; for (int d = 0; drivers[d].name; d++) { if (drivers[d].gated_on_existence && access(drivers[d].path, X_OK) != 0) { fprintf(stderr, "inferred_float_global: skip %s (no %s)\n", drivers[d].name, drivers[d].path); continue; } for (int i = 0; i < n; i++) { int got = run_driver(drivers[d].path, &rows[i], i); total++; if (got != rows[i].want) { fprintf(stderr, "inferred_float_global[%s][%s]: exit=%d want=%d\n", drivers[d].name, rows[i].label, got, rows[i].want); fail++; } } } if (access(wdrv, X_OK) == 0) { for (int i = 0; i < n; i++) { total++; if (asm_byte_identical(bin, &rows[i], i) != 0) fail++; } } if (fail) { fprintf(stderr, "inferred_float_global: %d/%d fixtures failed\n", fail, total); return 1; } printf("inferred_float_global: %d/%d ok\n", total, total); return 0; }