/*
 * 946_structparam_run — runtime + byte-id + asm-pattern net for #165, the
 * float-bearing struct-PARAM SysV ABI (the param twin of #171's struct
 * RETURN, and the struct counterpart of #163's per-element tuple PARAM).
 *
 * THE BUG (#165, cs==ww but SysV-non-conformant on master): struct args
 * ARE handled but GP-ONLY — the cgcall pop drained every struct eightbyte
 * into the INTEGER arg regs (DI/SI/..) and the callee cgfnparams receive
 * MOVQ'd them back from the same GP regs. So a `struct { a: f64, b: f64 }`
 * arg landed in DI/SI instead of X0/X1. For a pure INTERNAL ww call (both
 * ends compiled by the same stage) the f64 bits still round-trip through
 * the GP regs intact, so the runtime VALUE was correct AND both stages
 * were symmetric-GP — the cs==ww gate and a value check are therefore
 * NECESSARY-NOT-SUFFICIENT here (cf. 907_f32arg_run, same situation). The
 * genuine defect is SysV register-CLASS conformance, observable only in
 * the emitted asm (and at a real ABI boundary). The discriminating
 * dimension is therefore the asm pattern (c) below.
 *
 * THE FIX: per-EIGHTBYTE SysV classification (structs classify per
 * eightbyte, unlike #163's per-element tuples). Each 8-byte eightbyte that
 * is a lone f64 rides the SSE arg cursor (X0..X7); a pure-INTEGER eightbyte
 * rides the INTEGER cursor (DI/SI/..). SEND (cgcall pop) MOVSD's the float
 * eightbyte off (SP) into the next XMM; RECV (cgfnparams) MOVSD's the XMM
 * into the param slot. Symmetric across cstage (cmd/w6c/cgen.c
 * struct_float_class + the cgcall pop arm + cgfnparams) and wwstage
 * (cgenutil.ww structfloatclass + cgenexpr.ww cgcall pop + cgendecl.ww).
 *
 * THE FALLBACK GATE: only a struct whose every eightbyte is pure-INT or a
 * lone f64 qualifies. An f32 field packs two f32 into ONE SSE eightbyte
 * (needs packing — deferred #165b); a naive per-field reuse would WRONGLY
 * route its two f32 to two SSE regs. struct{f32,f32} therefore STAYS on
 * the GP transport (correct + byte-identical current behavior). The
 * f32f32 row asserts BOTH the correct round-tripped value AND the ABSENCE
 * of an SSE receive, proving the gate caught it.
 *
 * Each row carries THREE dimensions:
 *   (a) cstage `ww build` + run — exit code (end-to-end round-trip).
 *   (b) w6c vs w6c_ww `.s` cmp — rule-10 byte-id (both stages identical).
 *   (c) asm-pattern on the CALLEE function's receive: a lone-f64 eightbyte
 *       is received `MOVSD Xn, -off(BP)` (XMM -> slot); a GP eightbyte is
 *       `MOVQ DI, ...`. The marker is scoped to the callee `main.use` text
 *       (main's float-literal init also emits `MOVSD X0, -off(BP)`, so a
 *       whole-file grep would not discriminate). PRESENT for the SSE-routed
 *       rows, ABSENT for the GP / fallback rows. A pre-fix (or GP-regressed)
 *       build receives every struct eightbyte via MOVQ -> marker absent,
 *       which is exactly what (c) catches.
 */
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <unistd.h>
#include <sys/stat.h>
#include <sys/wait.h>

static int
runwait(const char *cmd)
{
	int rc = system(cmd);
	if (rc == -1) return -1;
	if (WIFEXITED(rc)) return WEXITSTATUS(rc);
	return -1;
}

struct row {
	const char *label;
	const char *src;
	int want_exit;
	int want_sse;	/* 1 = callee must receive an f64 eightbyte via XMM */
};

static const struct row rows[] = {
	/* HEADLINE — struct{f64,f64}. Both eightbytes lone f64 -> X0,X1. The
	 * callee receives `MOVSD X0, slot` + `MOVSD X1, slot`. s.a+s.b = 8.0. */
	{ "f64f64_arg",
	  "package main;\n"
	  "type pff = struct { a: f64, b: f64 };\n"
	  "fn use(s: pff) f64 = { return s.a + s.b; };\n"
	  "export fn main() i32 = {\n"
	  "\tlet s: pff = pff { a = 3.0, b = 5.0 };\n"
	  "\tif (use(s) != 8.0) { return 1; };\n"
	  "\treturn 0;\n"
	  "};\n", 0, 1 },
	/* struct{f64,i64} — eb0 lone f64 (X0), eb1 pure-INT (DI). Class is
	 * independent of eightbyte position. (s.a:i64)+s.b = 3+5 = 8. */
	{ "f64i64_arg",
	  "package main;\n"
	  "type pfi = struct { a: f64, b: i64 };\n"
	  "fn use(s: pfi) i64 = { return (s.a: i64) + s.b; };\n"
	  "export fn main() i32 = {\n"
	  "\tlet s: pfi = pfi { a = 3.0, b = 5 };\n"
	  "\tif (use(s) != 8) { return 1; };\n"
	  "\treturn 0;\n"
	  "};\n", 0, 1 },
	/* struct{i64,f64} — order-swap: eb0 pure-INT (DI), eb1 lone f64 (X0,
	 * the first float still gets X0). Confirms the float lands in the next
	 * XMM regardless of position. s.a + (s.b:i64) = 3+5 = 8. */
	{ "i64f64_arg",
	  "package main;\n"
	  "type pif = struct { a: i64, b: f64 };\n"
	  "fn use(s: pif) i64 = { return s.a + (s.b: i64); };\n"
	  "export fn main() i32 = {\n"
	  "\tlet s: pif = pif { a = 3, b = 5.0 };\n"
	  "\tif (use(s) != 8) { return 1; };\n"
	  "\treturn 0;\n"
	  "};\n", 0, 1 },
	/* GP REGRESSION — struct{i64,i64}: every eightbyte pure-INT, no float
	 * to route, so it STAYS on the GP transport unchanged (the in-tree
	 * byte-id case). Callee receives via MOVQ DI/SI -> no SSE marker. */
	{ "i64i64_arg",
	  "package main;\n"
	  "type pii = struct { a: i64, b: i64 };\n"
	  "fn use(s: pii) i64 = { return s.a + s.b; };\n"
	  "export fn main() i32 = {\n"
	  "\tlet s: pii = pii { a = 3, b = 5 };\n"
	  "\tif (use(s) != 8) { return 1; };\n"
	  "\treturn 0;\n"
	  "};\n", 0, 0 },
	/* FALLBACK GATE — struct{f32,f32}: two f32 pack into ONE SSE eightbyte
	 * (8B struct). The gate rejects f32, so the struct stays GP-routed
	 * (received via MOVQ DI). The value still round-trips (the 8B MOVQ
	 * carries both f32) -> (s.a:i64)+(s.b:i64) = 3+5 = 8. Asserts BOTH the
	 * correct value AND no SSE receive, proving the gate caught it (NOT
	 * routed to 2 SSE regs). The 2-f32-per-eightbyte packing is #165b. */
	{ "f32f32_arg_fallback",
	  "package main;\n"
	  "type pf32 = struct { a: f32, b: f32 };\n"
	  "fn use(s: pf32) i64 = { return (s.a: i64) + (s.b: i64); };\n"
	  "export fn main() i32 = {\n"
	  "\tlet s: pf32 = pf32 { a = 3.0f32, b = 5.0f32 };\n"
	  "\tif (use(s) != 8) { return 1; };\n"
	  "\treturn 0;\n"
	  "};\n", 0, 0 },
	/* CURSOR INDEPENDENCE — i64 scalar + struct{f64,f64}. n->DI (INTEGER
	 * cursor), s.a->X0, s.b->X1 (SSE cursor), independent counters.
	 * n + s.a + s.b = 2+3+5 = 10. SSE receive present. */
	{ "scalar_plus_f64f64",
	  "package main;\n"
	  "type pff = struct { a: f64, b: f64 };\n"
	  "fn use(n: i64, s: pff) i64 = {\n"
	  "\treturn n + (s.a: i64) + (s.b: i64);\n"
	  "};\n"
	  "export fn main() i32 = {\n"
	  "\tlet s: pff = pff { a = 3.0, b = 5.0 };\n"
	  "\tif (use(2, s) != 10) { return 1; };\n"
	  "\treturn 0;\n"
	  "};\n", 0, 1 },
	{ NULL, NULL, 0, 0 }
};

static int
slurp_eq(const char *a, const char *b)
{
	FILE *fa = fopen(a, "rb");
	FILE *fb = fopen(b, "rb");
	if (!fa || !fb) { if (fa) fclose(fa); if (fb) fclose(fb); return -1; }
	int rc = 0;
	for (;;) {
		int ca = fgetc(fa);
		int cb = fgetc(fb);
		if (ca != cb) { rc = -1; break; }
		if (ca == EOF) break;
	}
	fclose(fa); fclose(fb);
	return rc;
}

/* Does the callee `main.use` receive an f64 eightbyte via an XMM reg?
 * Isolate that function's text (its receive of an SSE eightbyte is the
 * only `MOVSD Xn, -off(BP)` store-to-slot in it; the body of these probes
 * stores no f64 local, and main's float-literal init — also a
 * `MOVSD X0, -off(BP)` — lives in a different function), then look for an
 * XMM-source store to a negative BP offset. Returns 1/0, or -1 on error. */
static int
callee_receives_sse(const char *path)
{
	FILE *f = fopen(path, "rb");
	if (!f) return -1;
	static char buf[1 << 18];
	size_t n = fread(buf, 1, sizeof buf - 1, f);
	fclose(f);
	buf[n] = '\0';

	char *start = strstr(buf, "TEXT main.use");
	if (!start) return -1;
	char *end = strstr(start + 1, "\nTEXT ");
	if (end) *end = '\0';
	/* `MOVSD\tX0, -` is the receive of the first (or only) f64 eightbyte;
	 * a GP-routed struct never emits it (MOVQ DI instead). */
	return strstr(start, "MOVSD\tX0, -") != NULL ? 1 : 0;
}

int
main(void)
{
	const char *bin = getenv("BIN");
	if (!bin) bin = "out/bin";
	char absbin[2200];
	if (bin[0] != '/') {
		char cwd[1024];
		if (getcwd(cwd, sizeof cwd) == NULL) return 1;
		snprintf(absbin, sizeof absbin, "%s/%s", cwd, bin);
		bin = absbin;
	}

	char w6c[2300], w6c_ww[2300];
	snprintf(w6c, sizeof w6c, "%s/w6c", bin);
	snprintf(w6c_ww, sizeof w6c_ww, "%s/w6c_ww", bin);
	if (access(w6c_ww, X_OK) != 0) {
		fprintf(stderr, "structparam: w6c_ww missing — cannot run the "
		    "cs==ww byte-id gate\n");
		return 1;
	}

	int n = 0, fail = 0;
	for (int i = 0; rows[i].src; i++, n++) {
		/* src, binary, and both .s files all live under one tmpdir so
		 * the compiler's path-derived .sepwork scratch stays inside it;
		 * a single `rm -rf` at the end of all phases reclaims it. */
		char tmpdir[64], src[128], outbin[128];
		char cs_s[128], ws_s[128], rmcmd[160];
		snprintf(tmpdir, sizeof tmpdir, "/tmp/wwstp_%d_d_%d",
		    getpid(), i);
		mkdir(tmpdir, 0755);
		snprintf(src, sizeof src, "%s/wwstp_%d_%d.ww",
		    tmpdir, getpid(), i);
		snprintf(outbin, sizeof outbin, "%s/wwstp_%d_%d",
		    tmpdir, getpid(), i);
		snprintf(cs_s, sizeof cs_s, "%s/wwstp_%d_%d_cs.s",
		    tmpdir, getpid(), i);
		snprintf(ws_s, sizeof ws_s, "%s/wwstp_%d_%d_ww.s",
		    tmpdir, getpid(), i);
		snprintf(rmcmd, sizeof rmcmd, "rm -rf %s", tmpdir);

		FILE *f = fopen(src, "wb");
		if (f == NULL) { runwait(rmcmd); fail++; continue; }
		fputs(rows[i].src, f);
		fclose(f);

		char cmd[4096];

		/* (a) cstage build + run. */
		snprintf(cmd, sizeof cmd, "%s/ww build -o %s %s",
		    bin, outbin, src);
		if (runwait(cmd) != 0) {
			fprintf(stderr, "row[%s]: cstage build failed\n",
			    rows[i].label);
			fail++;
			runwait(rmcmd);
			continue;
		}

		int got = runwait(outbin);
		if (got != rows[i].want_exit) {
			fprintf(stderr, "row[%s]: cstage exit %d, want %d\n",
			    rows[i].label, got, rows[i].want_exit);
			fail++;
		}

		/* (b) cs==ww byte-id gate: emit .s from both stages, cmp. */
		snprintf(cmd, sizeof cmd, "%s -o %s %s 2>/dev/null",
		    w6c, cs_s, src);
		if (runwait(cmd) != 0) {
			fprintf(stderr, "row[%s]: w6c failed\n", rows[i].label);
			fail++; runwait(rmcmd); continue;
		}
		snprintf(cmd, sizeof cmd, "%s -o %s %s 2>/dev/null",
		    w6c_ww, ws_s, src);
		if (runwait(cmd) != 0) {
			fprintf(stderr, "row[%s]: w6c_ww failed\n",
			    rows[i].label);
			fail++; runwait(rmcmd); continue;
		}
		if (slurp_eq(cs_s, ws_s) != 0) {
			fprintf(stderr,
			    "row[%s]: cstage/wwstage .s DIFFER (rule-10 "
			    "byte-id violation)\n", rows[i].label);
			fail++;
		}

		/* (c) asm-pattern discriminator on the callee receive. byte-id
		 * (b) proves ww_s mirrors cs_s, so checking cs_s suffices. */
		int sse = callee_receives_sse(cs_s);
		if (sse < 0) {
			fprintf(stderr, "row[%s]: cannot scan callee .s\n",
			    rows[i].label);
			fail++;
		} else if (sse != rows[i].want_sse) {
			fprintf(stderr,
			    "row[%s]: callee SSE receive %s, want %s "
			    "(register-class discriminator)\n",
			    rows[i].label, sse ? "present" : "absent",
			    rows[i].want_sse ? "present" : "absent");
			fail++;
		}
		runwait(rmcmd);
	}

	if (fail) {
		fprintf(stderr, "%d/%d struct-param tests failed\n", fail, n);
		return 1;
	}
	printf("structparam: %d/%d ok (cstage run + cs==ww byte-id + "
	    "SSE-receive asm)\n", n, n);
	return 0;
}