Commit Graph

2 Commits

Author SHA1 Message Date
60c3e51dc5 test: 953 add #98 XMM-pressure row (myf.g() as 1-of-3 f64 args, MOVSD->X2)
Basic x98_nested_arg only spills the imported f64 call-result into the
first float slot (X0); a multi-f64-arg call forces the spill into X2
while two more f64 args are live, exercising pushargsrev's float spill
under XMM register pressure — a distinct path. Verified .s diverges on
master 6f8b658 (integer PUSHQ AX/POPQ DI for the myf.g() arg) and is
byte-identical post-fix; cstage run exits 8 (sum3(-7,10.5,4.5)=8.0:i32).
(#98)
2026-05-25 14:04:07 +09:00
ab22900ad1 test: 953 f64 cross-module return cast/arg cs==ww byte-id + cstage run (#98/#101)
Regression net with two dimensions per row because cstage is correct
before and after the fix — a cstage-only probe is gate-blind to a
wwstage-only divergence:
  (a) cstage `ww build` + run, asserting the truncated exit code;
  (b) w6c vs w6c_ww `.s` cmp, FAILING on any rule-10 divergence.

Rows cover #101 (`mod.g(): i32`, neg + both truncation directions) and
#98 (`dbl(mod.g())` forwarding an imported f64 call-result as an f64
arg). Verified: dimension (b) FAILS on master 6f8b658 (pre-fix wwstage
emits MOVSXD/integer-PUSHQ) and PASSES post-fix (byte-identical);
dimension (a) passes on both, confirming cstage was always correct.
2026-05-25 13:51:13 +09:00