cstage+selfhost+test: cgen N_ASSIGN whole-STRUCT (call+structlit, 5 sites)

Receive side of #4's cgreturn ABI (aee8149) for TY_STRUCT lvalues of
size <=24B. Producer materialises rhs into AX=bytes[0..7], DX=[8..15],
CX=[16..23], zero-padded to 24B; receive sites here read the regs and
write only `declared sz` bytes — MOVQ for full 8B chunks plus a sized
tail (MOVL/MOVW/MOVB) by the *declared* struct size. ASYMMETRY: do NOT
mirror the sender's three uniform MOVQs, else trailing 1..7B chunks
overrun the next local slot. Tail chunks in {3,5,6,7} are unreachable
under WW struct align rules (size%align==0) and fall through.

Five sites wired in each stage (cstage cgen.c, wwstage cgenexpr.ww +
cgenstmt.ww), call-result + structlit rhs at each:
  - N_LET   `let s: T = bar()` / `= T{...}`           cgenstmt cglet
  - N_ASSIGN N_IDENT-lhs   `s = bar()` / `= T{...}`   cgenexpr cgassign
  - N_ASSIGN single-DOT local-base   `o.f = ...`
  - N_ASSIGN single-DOT ptr-base auto-deref   `p.f = ...`
  - N_ASSIGN single-DOT global-base   `g.f = ...`
  - N_ASSIGN chained-DOT depth>=2   `o.m.in = ...`
(The four dot-flavors share one shape pattern, hence "5 sites".) Where
the dst addr needs scratch (ptr-base/global-base/via_cx), it is loaded
into BX after the call so CX stays as the third value word; for
structlit field-walks BX is reloaded before each store since cgexpr
clobbers AX/BX between fields.

wwstage needed a new `structnaturalsize(si)` helper (cgenutil.ww):
si.totsize is mis-named — it's slot-padded to 8 by registerstruct for
stack-slot use, while the receive ABI wants the type's natural size
(max(foff+fsz)). Splitting si.totsize into naturalsize + slotsize is
tracked as the wwstage struct sizing follow-up (task #15); until that
lands, the helper recovers the natural size at receive sites.

Test 701_cgassign_struct.c (18 rows, 3 checks each — cstage value,
wwstage value, asm byte-identity), wired in Makefile after 698. The
headline ASYMMETRY case is the 20B `{i32×5}` row: sender pads to 24B
via three MOVQs, receiver writes MOVQ AX +0, MOVQ DX +8, MOVL CX +16.
A regression to a MOVQ tail there overruns 4B past the slot and
flips the exit-code check.

smoke.combined.ww is the auto-regen ride-along of strings.freeall
landing in 714d089 (worker-shlex).

Pre-existing gaps surfaced and tracked separately (not fixed here,
out of scope):
  - task #16: silent drop of `(*p).f = ...` explicit-deref dot lhs.
  - task #17: silent zero of nested STRUCTLIT field in N_LET / N_ASSIGN
    initializer — the field_chain and field_global test rows use
    explicit field writes (`o.m.t = 10i64;`) rather than nested
    literals as a fixture-level workaround.
  - task #9: module-name-mangle for fn labels avoided in the
    field_global_call fixture by `let g: outer;` (no init).

make test: 59/59. 994_w6c_ww + 995_self_rebuild PASS — bootstrap
byte-identity is the load-bearing proof for this commit's scope.

selfhost/cmd/wcc/cgenstmt.ww

@@ -648,6 +648,79 @@ fn cglet(c: *cgen, n: *node) void = {
 				return;
 			};
 		};
+		// Whole-struct receive for sizes <=24B (call-result rhs).
+		// Counterpart of #4's cgreturn ABI: cgexpr leaves
+		// AX=bytes[0..7], DX=bytes[8..15], CX=bytes[16..23],
+		// zero-padded to 24B by the producer.
+		//
+		// ASYMMETRY (do NOT mirror the sender): producer emits three
+		// uniform MOVQs into a zero-padded 24B scratch slot; the
+		// receiver writes only `sz` bytes — MOVQ for full 8B chunks
+		// plus a sized tail (MOVL/MOVW/MOVB) by the *declared*
+		// struct size. Otherwise a trailing 1..7-byte chunk would
+		// overrun into the next local slot.
+		//
+		// Tail chunks in {3,5,6,7} (unreachable under WW struct
+		// alignment rules — field aligns force size%align==0) fall
+		// through to the generic scalar store rather than emit a
+		// stomping MOVQ tail. Sizes >24B also fall through (sret
+		// deferred, same constraint as #4). Mirrors the cstage
+		// cgen.c N_LET receive branch.
+		if (rhs.kind == nkind.N_CALL) {
+			let sname: str;
+			sname.ptr = nil; sname.len = 0;
+			if (tn != nil) {
+				if (tn.kind == nkind.N_TNAME) {
+					sname = tn.str;
+				};
+			};
+			if (sname.len > 0) {
+				let lsi: *structinfo = structlookup(c, sname);
+				if (lsi != nil) {
+					// si.totsize is slot-padded (rounded to 8) for
+					// stack-slot use; the receive ABI needs the
+					// TYPE's natural size — see structnaturalsize.
+					let lsz: i32 = structnaturalsize(lsi);
+					let tlm: i32 = lsz - (lsz / 8) * 8;
+					if (lsz <= 24) {
+						if (tlm == 0 || tlm == 1
+						    || tlm == 2 || tlm == 4) {
+							cgexpr(c, rhs);
+							let full: i32 = lsz / 8;
+							let i: i32 = 0;
+							for (i < full) {
+								let reg: str = "AX";
+								if (i == 1) { reg = "DX"; };
+								if (i == 2) { reg = "CX"; };
+								emitline("\tMOVQ\t");
+								emitline(reg);
+								emitline(", ");
+								emitoff((off + i * 8): i64);
+								emitline("(BP)\n");
+								i += 1;
+							};
+							if (tlm > 0) {
+								let top: str = "MOVB";
+								if (tlm == 4) { top = "MOVL"; };
+								if (tlm == 2) { top = "MOVW"; };
+								let treg: str = "AX";
+								if (full == 1) { treg = "DX"; };
+								if (full == 2) { treg = "CX"; };
+								emitline("\t");
+								emitline(top);
+								emitline("\t");
+								emitline(treg);
+								emitline(", ");
+								emitoff((off + full * 8): i64);
+								emitline("(BP)\n");
+							};
+							c.lastwasreturn = 0;
+							return;
+						};
+					};
+				};
+			};
+		};
 		cgexpr(c, rhs);
 		// Float local: cgexpr leaves the value in X0. Spill via
 		// MOVSS (f32, 4B) or MOVSD (f64, 8B).