cgen: B5-c2 #73 graduation — the 6 tripwired field gates chase, tripwire deleted
Close-by-construction replacing containment — the designed graduation
path from F1-c1's commit body. The 6 fld_alias_tripwire call sites
(indexed-elem field store/read, heap struct-lit field fill, tuple-elem
read, ptr-chain field read, static struct-lit emit) chase their fu
through type_chase_named; the 6 tripwire calls AND the helper itself
(incl. its :447 peel) are DELETED. Raw `->under` in cgen.c 69→62.
#73 CLOSES.
TRAIN INVARIANT holds: cs-only; w6c_ww/ww_ww bit-identical to the
bcd948d baseline md5s (28ad889042bad8006f1997cbcec94805 /
4e9ca8741f19e1f68219ff799a5e5a14). ZERO new corpus movers vs the c1
tip (kb*/kna corpus + five mains byte-NEUTRAL — the chased gates only
fire on 2+-level alias aggregate fields, none in corpus).
Gate-arm graduations (pre = loud "#73" fatal on cs, ww ok/0; post =
0/0 BYTE-ID): slice/str/tagged arms at the indexed STORE gate
(g73_idxstore/g73_strfield/g73_tagfield), slice arm at the indexed
READ / ptr-chain READ / tuple-elem READ gates (g73_idxread/g73_ptrread/
g73_tupread), nested-struct arm at the static emit gate
(g73_static_struct). The existing 944_alias_accept_run tripwire bound
row graduates K_BUILDERR_CS → K_RUN.
Two arms cannot pin the full 0/0 byte-id cell — documented, not silent:
- heap fill (g73_heapfill, COMPILE-only pin): bare /tmp programs
never link malloc (both stages, pre-existing infra) and ww's
deref-field READ carries the #24-kin field(SB) leak; the chased
FILL bytes verified byte-id by hand against the plain (non-alias)
control — divergence shape identical, all of it in the pre-existing
read sites.
- str-field static emit (g73_static_str): the #73 fatal gave way to
the pre-existing #129 A.2 foldability loud on cs — now both-loud
twin texts (fill0 class), pinned as K_BUILDERR.
- struct-copy arm: NO runnable repro reaches these gates — indexed
whole-struct field reads take the (already chased, byte-id) address
spine, and tuple-of-struct louds upstream on BOTH stages (#54-kin
"aggregate init from unhandled rhs shape"). The arm's only carrier
was the heap gate, covered by the compile pin above.
944_alias_cgen_b5_run grows 16→25 rows (65 checks); all 944-family
suites green; sizelint 0.
This commit is contained in:
@@ -460,12 +460,11 @@ static const struct row rows[] = {
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" if (w[2] != 900) { return 2; };\n"
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" return 0;\n"
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"};\n", 0, K_RUN, NULL }, /* graduated: #60 (F2a batch 1) */
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/* #73 tripwire pin: the UNPROBED single-peel field gates
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/* #73 GRADUATED (B5-c2): the tripwired single-peel field gates
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* (indexed-elem store/read, ptr-chain read, heap fill, tuple-elem
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* read, static emit) hard-error on a 2+-level alias over an
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* aggregate base instead of emitting a word0 tail. ww accepts and
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* runs these — cs-only loud until #73's chase. 1-level controls
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* verified per gate (/tmp/revF1 t*c probes). */
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* read, static emit) now chase the field type — the loud bound
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* flipped to working 0/0 byte-id. Per-gate-arm rows live in
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* 944_alias_cgen_b5_run. */
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{ "slicefield_idx_tripwire_73",
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"package main;\n"
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"type sl = []int;\n"
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@@ -477,8 +476,7 @@ static const struct row rows[] = {
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" xs[0].s = a[0:3];\n"
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" if (xs[0].s.len != 3) { return 1; };\n"
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" return 0;\n"
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"};\n", 0, K_BUILDERR_CS,
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"unswept single-peel gate (#73)" },
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"};\n", 0, K_RUN, NULL }, /* graduated: #73 (B5-c2) */
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/* Values >255 break the esz=1 prefix-luck; the write-then-read
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* pins the IMULQ stride on both the read and write spines. */
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{ "idx_2level",
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