w6c+w6a+selfhost+lib: cgen+asm bugs surfaced by hash modules

Seven fixes across the toolchain, plus three new lib/hash modules
(adler32, crc16, crc32) that surfaced them.

  1. `~x` on u8/u16/u32 left the upper bits set: NOTQ inverts the
     whole 64-bit register and nothing trimmed it back to type
     width, so a returned `u16` would compare 64-bit against a
     typed literal and disagree. Both stages now mask after NOTQ
     for narrow unsigned: AND $0xFF/0xFFFF for u8/u16, MOVL r,r for
     u32 (ANDQ $0xFFFFFFFF sign-extends imm32 and is a no-op).
     Signed narrows stay sign-extended and need no fix-up. See
     cmd/w6c/cgen.c N_UN TK_TILDE and selfhost cgenexpr.ww cgun
     TK_TILDE with new nodeprimwidth helper.

  2. w6a had no D_CONST immediate path for ANDQ / ORQ. cgen would
     emit `ANDQ $65535, AX` and the rr encoder silently wrote
     `21 /r` with garbage reg fields — the mask never happened.
     Added `81 /4` (AND) and `81 /1` (OR) imm32 paths in both
     cstage and selfhost w6a. The ~width fix above depends on this.

  3. `s: []u8` cast as a direct fn argument produced a 0-length
     slice. cgexpr for N_CAST left (AX=ptr, BX=len) from the str
     source but never set CX (cap), and the arg-push fallback only
     pushed AX. cgcast now synthesises CX=BX when target is slice
     and source is str; node_isslice / arg-push recognise
     cast-to-slice and emit the full (cap, len, ptr) triple. Both
     stages.

  4. `*[N]T` element-store used 8-byte stride + MOVQ regardless of
     T's width. Indexing `buf: *[4]u16` would step 8 bytes and
     write 8 bytes per element. Added idx_eff (drills *[N]T → T)
     in cstage and the matching pointer-array drill in selfhost
     elemsizeof. Also added MOVW / MOVZWQ / MOVSWQ to w6c, w6a,
     and selfhost mirrors so 2-byte element stores/loads use the
     right opcode (was falling through to MOVQ and trailing 6 bytes
     into the next slot).

  5. Slicing a top-level fixed array (`g[0:n]` where `g: [N]T` is
     a global) computed the base from BP instead of the symbol —
     localfind returned 0 and the cgen treated it as a local at
     offset 0. Both N_SLICE-as-expression (cgslice) and N_SLICE-
     as-call-arg paths now check let_islet / letvartnode and emit
     LEAQ name(SB) when the base is a global array (or MOVQ
     name(SB) for a global slice/pointer base). Both stages.

  6. Top-level `let arr: [N]T = [v0, v1, ...]` link-failed on
     cstage — emit_lets bailed when it saw N_ARRLIT init on an
     array type, and the sz==8 scalar path then misemitted any
     8-byte-sized array (e.g. [4]u16, [8]u8) as a single quad.
     emit_lets now walks N_ARRLIT, evaluates each element as an
     int/rune/bool/nil literal, packs per-element bytes
     little-endian, and honours the trailing `...` repeat marker.
     Selfhost already handled the literal-init path; fixed the
     parallel sz==8 duplicate-DATAW emit on its side (the array
     and the scalar paths both fired, last write winning at link
     but the duplicate broke cross-stage byte-identicality on user
     code with this shape).

  7. w6a's per-line input buffer was a 1KB stack `char buf[1024]`.
     A `DATAW` for a [256]u16 emits ~2080 bytes on one line, which
     truncated mid-escape; the assembler then re-parsed the
     remaining tail as garbage opcodes ("unknown opcode"). Bumped
     cstage w6a to a 32K static buffer (selfhost w6a already
     allocated per-line via amalloc).

  lib: lib/hash/adler32, lib/hash/crc16, lib/hash/crc32 — pure
  buffer-subset shape (matching lib/hash/fnv), with per-module
  *_test.ww runnable via `ww test lib/hash/<name>`. Adler-32 plus
  CRC-16 (CCITT/CMDA2000/DECT/ANSI) and CRC-32 (IEEE/Castagnoli/
  Koopman) cover Hare's reference vectors bit-for-bit. Wired into
  test/wcc/900_stdlib.c. .gitignore: lib/**/*.s,*.o so `ww test`
  droppings stay untracked.

`make test` (26/26), `make bootstrap` (ww2≡ww3≡ww4), and per-module
`ww test` all pass. cgen output is byte-identical across cstage and
selfhost for every repro that previously diverged.

cmd/w6a/asm.c

@@ -453,6 +453,57 @@ a_encode(Asm *a)
 				a->errs++;
 			}
 			break;
+		case A_MOVW:
+			/* 16-bit MOV: prefix 0x66 selects 16-bit operand size.
+			 * MOV r/m16, r16 — 66 89 /r; MOV r16, r/m16 — 66 8B /r.
+			 * No REX.W (operand-size prefix beats REX.W). */
+			if (p->from.type >= D_AX && p->from.type <= D_R15
+			    && p->to.type == D_INDIR) {
+				a_emit_byte(a, 0x66);
+				emit_rex(a, rhi(p->from.type), rhi(p->to.reg), 0);
+				a_emit_byte(a, 0x89);
+				emit_modrm_mem(a, rcode(p->from.type),
+				    p->to.reg, p->to.offset);
+			} else if (p->from.type == D_INDIR
+			    && p->to.type >= D_AX && p->to.type <= D_R15) {
+				a_emit_byte(a, 0x66);
+				emit_rex(a, rhi(p->to.type), rhi(p->from.reg), 0);
+				a_emit_byte(a, 0x8B);
+				emit_modrm_mem(a, rcode(p->to.type),
+				    p->from.reg, p->from.offset);
+			} else {
+				fprintf(stderr, "w6a: line %d: unsupported MOVW shape\n", p->line);
+				a->errs++;
+			}
+			break;
+		case A_MOVZWQ:
+			/* MOVZX r64, r/m16 — 0F B7 /r with REX.W */
+			if (p->from.type == D_INDIR
+			    && p->to.type >= D_AX && p->to.type <= D_R15) {
+				emit_rex(a, rhi(p->to.type), rhi(p->from.reg), 1);
+				a_emit_byte(a, 0x0F);
+				a_emit_byte(a, 0xB7);
+				emit_modrm_mem(a, rcode(p->to.type),
+				    p->from.reg, p->from.offset);
+			} else {
+				fprintf(stderr, "w6a: line %d: unsupported MOVZWQ shape\n", p->line);
+				a->errs++;
+			}
+			break;
+		case A_MOVSWQ:
+			/* MOVSX r64, r/m16 — 0F BF /r with REX.W */
+			if (p->from.type == D_INDIR
+			    && p->to.type >= D_AX && p->to.type <= D_R15) {
+				emit_rex(a, rhi(p->to.type), rhi(p->from.reg), 1);
+				a_emit_byte(a, 0x0F);
+				a_emit_byte(a, 0xBF);
+				emit_modrm_mem(a, rcode(p->to.type),
+				    p->from.reg, p->from.offset);
+			} else {
+				fprintf(stderr, "w6a: line %d: unsupported MOVSWQ shape\n", p->line);
+				a->errs++;
+			}
+			break;
 		case A_MOVB:
 			/* MOV r/m8, r8 — 88 /r. No REX.W. We always emit REX
 			 * to allow access to SIL/DIL/BPL/SPL. */
@@ -638,8 +689,24 @@ a_encode(Asm *a)
 			else
 				encode_rr(a, 0x29, p->from.type, p->to.type);
 			break;
-		case A_ANDQ:	encode_rr(a, 0x21, p->from.type, p->to.type); break;
-		case A_ORQ:	encode_rr(a, 0x09, p->from.type, p->to.type); break;
+		case A_ANDQ:
+			/* AND r/m64, imm32 — 81 /4 (REX.W). Without the
+			 * D_CONST path the rr encoder would silently emit
+			 * a 0x21 with garbage reg fields. */
+			if (p->from.type == D_CONST
+			    && p->to.type >= D_AX && p->to.type <= D_R15)
+				encode_ri_imm32(a, 0x81, 4, p->to.type, (i32)p->from.offset);
+			else
+				encode_rr(a, 0x21, p->from.type, p->to.type);
+			break;
+		case A_ORQ:
+			/* OR r/m64, imm32 — 81 /1 (REX.W). Mirrors ANDQ. */
+			if (p->from.type == D_CONST
+			    && p->to.type >= D_AX && p->to.type <= D_R15)
+				encode_ri_imm32(a, 0x81, 1, p->to.type, (i32)p->from.offset);
+			else
+				encode_rr(a, 0x09, p->from.type, p->to.type);
+			break;
 		case A_XORQ:
 			if (p->from.type == D_CONST
 			    && p->to.type >= D_AX && p->to.type <= D_R15)

cmd/w6a/parse.c

@@ -83,8 +83,9 @@ opcode_lookup(const char *m)
 {
 	struct { const char *m; int op; } tab[] = {
 		{ "MOVQ", A_MOVQ }, { "MOVL", A_MOVL },
-		{ "MOVB", A_MOVB }, { "MOVZBQ", A_MOVZBQ },
-		{ "MOVSXD", A_MOVSXD },
+		{ "MOVW", A_MOVW }, { "MOVB", A_MOVB },
+		{ "MOVZBQ", A_MOVZBQ }, { "MOVZWQ", A_MOVZWQ },
+		{ "MOVSXD", A_MOVSXD }, { "MOVSWQ", A_MOVSWQ },
 		{ "MOVSD", A_MOVSD },
 		{ "ADDSD", A_ADDSD },{ "SUBSD", A_SUBSD },
 		{ "MULSD", A_MULSD },{ "DIVSD", A_DIVSD },
@@ -263,7 +264,10 @@ parse_operand(Asm *a, const char *s, Aoperand *out)
 int
 a_parse(Asm *a)
 {
-	char buf[1024];
+	/* Big enough for a DATAW emitting a [256]u32 table (1024 bytes
+	 * → ~4100 chars of `\xNN` escapes plus directive boilerplate).
+	 * Selfhost w6a allocates per-line; this is the cstage equivalent. */
+	static char buf[32768];
 	char *line;
 	size_t len;
 	const char *pending_label = NULL;

cmd/w6c/6.out.h

@@ -49,9 +49,12 @@ enum {
 
 	A_MOVQ,
 	A_MOVL,
+	A_MOVW,
 	A_MOVB,
 	A_MOVZBQ,	/* movzx r64, r/m8 — load byte zero-extended */
+	A_MOVZWQ,	/* movzx r64, r/m16 — load word zero-extended */
 	A_MOVSXD,	/* movsxd r64, r/m32 — load i32 sign-extended */
+	A_MOVSWQ,	/* movsx r64, r/m16 — load word sign-extended */
 
 	/* SSE2 scalar double-precision float */
 	A_MOVSD,	/* xmm/m → xmm and xmm → m */

cmd/w6c/cgen.c

@@ -521,6 +521,21 @@ type_unwrap(Type *t)
 	return (t->kind == TY_NAMED) ? t->under : t;
 }
 
+/* Element-effective type for indexing. For `*[N]T` we drill through
+ * the pointer to the underlying array so esz/esub reflect T, not the
+ * whole-array pointee. For everything else returns t unchanged. */
+static Type *
+idx_eff(Type *t)
+{
+	if (t == NULL) return NULL;
+	Type *u = type_unwrap(t);
+	if (u && u->kind == TY_PTR && u->sub) {
+		Type *p = type_unwrap(u->sub);
+		if (p && p->kind == TY_ARRAY) return p;
+	}
+	return u;
+}
+
 static int
 decl_has_ffisym(Node *d)
 {
@@ -1322,7 +1337,27 @@ cgexpr(Cg *c, Node *n, Local *locals)
 				ins1(c, A_NEGQ, areg(D_AX));
 			}
 			break;
-		case TK_TILDE:	ins1(c, A_NOTQ, areg(D_AX)); break;
+		case TK_TILDE:
+			/* NOTQ inverts the whole 64-bit register. For unsigned
+			 * narrow types we clamp to the type width so the
+			 * upper bits are 0, matching how zero-extended loads
+			 * leave the register. Signed narrow types already
+			 * end up sign-extended (NOTQ on a sign-extended
+			 * positive becomes sign-extended negative), so they
+			 * need no fix-up. u32 uses MOVL r,r (zero-extends
+			 * upper 32) because ANDQ $0xFFFFFFFF would sign-extend
+			 * the imm32 to all-ones and act as a no-op. */
+			ins1(c, A_NOTQ, areg(D_AX));
+			if (n->type && type_isunsigned(n->type)
+			    && n->type->size < 8) {
+				if (n->type->size == 4) {
+					ins2(c, A_MOVL, areg(D_AX), areg(D_AX));
+				} else {
+					u64 mask = ((u64)1 << (n->type->size * 8)) - 1;
+					ins2(c, A_ANDQ, aimm((i64)mask), areg(D_AX));
+				}
+			}
+			break;
 		case TK_NOT: {
 			ins2(c, A_CMPQ, aimm(0), areg(D_AX));
 			char *t = mklabel(c, "tt");
@@ -1969,9 +2004,13 @@ cgexpr(Cg *c, Node *n, Local *locals)
 			int is_arr = u && u->kind == TY_ARRAY;
 			int is_sl  = u && u->kind == TY_SLICE;
 			int is_ptr = u && u->kind == TY_PTR;
-			int esz = (u && u->sub) ? (int)u->sub->size : 1;
-			int elem_is_str = u && u->sub && type_isstr(u->sub);
-			Type *esub = u ? u->sub : NULL;
+			/* For `*[N]T` drill through to the array so esz reflects
+			 * T, not sizeof(array). Base load still uses u (MOVQ
+			 * because is_ptr stays true). */
+			Type *eff = idx_eff(bt);
+			int esz = (eff && eff->sub) ? (int)eff->sub->size : 1;
+			int elem_is_str = eff && eff->sub && type_isstr(eff->sub);
+			Type *esub = eff ? eff->sub : NULL;
 			Type *esubu = (esub && esub->kind == TY_NAMED)
 			    ? esub->under : esub;
 			int elem_tagged = esubu && esubu->kind == TY_TAGGED;
@@ -2074,6 +2113,7 @@ cgexpr(Cg *c, Node *n, Local *locals)
 				}
 				int store_op = A_MOVQ;
 				if (esz == 1) store_op = A_MOVB;
+				else if (esz == 2) store_op = A_MOVW;
 				else if (esz == 4) store_op = A_MOVL;
 				ins2(c, store_op, areg(D_AX), amem(D_BX, 0));
 				break;
@@ -2755,7 +2795,17 @@ cgexpr(Cg *c, Node *n, Local *locals)
 				/* base addr → push */
 				if (base->kind == N_IDENT) {
 					int boff = localfind(locals, base->str);
-					if (bu && bu->kind == TY_ARRAY) {
+					int isglobal = (boff == 0) &&
+					    let_islet(base->str);
+					if (isglobal && bu && bu->kind == TY_ARRAY) {
+						ins2(c, A_LEAQ,
+						    masym(c, base->str),
+						    areg(D_AX));
+					} else if (isglobal) {
+						ins2(c, A_MOVQ,
+						    masym(c, base->str),
+						    areg(D_AX));
+					} else if (bu && bu->kind == TY_ARRAY) {
 						ins2(c, A_LEAQ, amem(D_BP, boff), areg(D_AX));
 					} else {
 						ins2(c, A_MOVQ, amem(D_BP, boff), areg(D_AX));
@@ -2771,7 +2821,17 @@ cgexpr(Cg *c, Node *n, Local *locals)
 				else if (base->kind == N_IDENT && bu &&
 				    (bu->kind == TY_SLICE || bu->kind == TY_STR)) {
 					int boff = localfind(locals, base->str);
-					ins2(c, A_MOVQ, amem(D_BP, boff + 8), areg(D_AX));
+					int isglobal = (boff == 0) &&
+					    let_islet(base->str);
+					if (isglobal) {
+						ins2(c, A_LEAQ,
+						    masym(c, base->str),
+						    areg(D_CX));
+						ins2(c, A_MOVQ,
+						    amem(D_CX, 8), areg(D_AX));
+					} else {
+						ins2(c, A_MOVQ, amem(D_BP, boff + 8), areg(D_AX));
+					}
 				} else {
 					cgexpr_int(c, 0);
 				}
@@ -2849,6 +2909,13 @@ cgexpr(Cg *c, Node *n, Local *locals)
 			} else if (node_isstr(args[i])) {
 				ins1(c, A_PUSHQ, areg(D_BX));	/* len */
 				ins1(c, A_PUSHQ, areg(D_AX));	/* ptr — top */
+			} else if (node_isslice(args[i])) {
+				/* Slice-typed arg without a fast path above
+				 * (e.g. `s: []u8` cast): cgexpr left
+				 * (AX=ptr, BX=len, CX=cap). Push the triple. */
+				ins1(c, A_PUSHQ, areg(D_CX));	/* cap */
+				ins1(c, A_PUSHQ, areg(D_BX));	/* len */
+				ins1(c, A_PUSHQ, areg(D_AX));	/* ptr — top */
 			} else if (node_istaggedarg(args[i])) {
 				/* Tagged-return ABI: AX=tag, DX=val0,
 				 * CX=val1, R8=val2. Push high-to-low so pop
@@ -3391,6 +3458,22 @@ cgexpr(Cg *c, Node *n, Local *locals)
 			int op = to_f32 ? A_CVTSD2SS : A_CVTSS2SD;
 			ins2(c, op, areg(D_X0), areg(D_X0));
 		}
+		/* str → []u8 (or any []T): cgexpr left (AX=ptr, BX=len).
+		 * Slice register convention is (AX=ptr, BX=len, CX=cap);
+		 * synthesise cap = len so downstream arg-push / let-init
+		 * paths see the canonical triple. Without this, the cap
+		 * register stays whatever cgexpr happened to leave there
+		 * and the receiver reads a stale value. */
+		{
+			Type *tt = n->type;
+			Type *tu = (tt && tt->kind == TY_NAMED) ? tt->under : tt;
+			Type *ft = n->lhs ? n->lhs->type : NULL;
+			Type *fu = (ft && ft->kind == TY_NAMED) ? ft->under : ft;
+			if (tu && tu->kind == TY_SLICE
+			    && fu && fu->kind == TY_STR) {
+				ins2(c, A_MOVQ, areg(D_BX), areg(D_CX));
+			}
+		}
 		break;
 	}
 	case N_DOT: {
@@ -3748,13 +3831,16 @@ cgexpr(Cg *c, Node *n, Local *locals)
 	}
 	case N_INDEX: {
 		/* Scaled indexing for slice/array/str/ptr-to-T.
-		 * Element size is 1 for u8/str, otherwise type's natural size. */
+		 * Element size is 1 for u8/str, otherwise type's natural size.
+		 * For `*[N]T` drill through to the array so esz/esub reflect
+		 * T, not sizeof(array). */
 		Type *bt = n->lhs ? n->lhs->type : NULL;
 		Type *u = (bt && bt->kind == TY_NAMED) ? bt->under : bt;
+		Type *eff = idx_eff(bt);
 		int esz = 1;
-		if (u && u->sub) esz = (int)u->sub->size;
+		if (eff && eff->sub) esz = (int)eff->sub->size;
 		if (u && u->kind == TY_STR) esz = 1;
-		Type *esub = u ? u->sub : NULL;
+		Type *esub = eff ? eff->sub : NULL;
 		Type *esubu = (esub && esub->kind == TY_NAMED)
 		    ? esub->under : esub;
 		int elem_tagged = esubu && esubu->kind == TY_TAGGED;
@@ -3811,11 +3897,12 @@ cgexpr(Cg *c, Node *n, Local *locals)
 				ins2(c, A_MOVQ, amem(D_BX, 0), areg(D_AX));
 				break;
 			}
-			int signed_elem = u && u->sub && (
-			    u->sub->kind == TY_I8 || u->sub->kind == TY_I16 ||
-			    u->sub->kind == TY_I32);
+			int signed_elem = esub && (
+			    esub->kind == TY_I8 || esub->kind == TY_I16 ||
+			    esub->kind == TY_I32);
 			int load_op = A_MOVQ;
 			if (esz == 1) load_op = A_MOVZBQ;
+			else if (esz == 2) load_op = signed_elem ? A_MOVSWQ : A_MOVZWQ;
 			else if (esz == 4) load_op = signed_elem ? A_MOVSXD : A_MOVL;
 			ins2(c, load_op, amem(D_BX, 0), areg(D_AX));
 			break;
@@ -3858,11 +3945,12 @@ cgexpr(Cg *c, Node *n, Local *locals)
 			break;
 		}
 		{
-			int signed_elem = u && u->sub && (
-			    u->sub->kind == TY_I8 || u->sub->kind == TY_I16 ||
-			    u->sub->kind == TY_I32);
+			int signed_elem = esub && (
+			    esub->kind == TY_I8 || esub->kind == TY_I16 ||
+			    esub->kind == TY_I32);
 			int load_op = A_MOVQ;
 			if (esz == 1) load_op = A_MOVZBQ;
+			else if (esz == 2) load_op = signed_elem ? A_MOVSWQ : A_MOVZWQ;
 			else if (esz == 4)
 				load_op = signed_elem ? A_MOVSXD : A_MOVL;
 			ins2(c, load_op, amem(D_AX, 0), areg(D_AX));
@@ -3884,7 +3972,14 @@ cgexpr(Cg *c, Node *n, Local *locals)
 		Type *bu = (bt && bt->kind == TY_NAMED) ? bt->under : bt;
 		if (base && base->kind == N_IDENT) {
 			int boff = localfind(locals, base->str);
-			if (bu && bu->kind == TY_ARRAY) {
+			int isglobal = (boff == 0) && let_islet(base->str);
+			if (isglobal && bu && bu->kind == TY_ARRAY) {
+				ins2(c, A_LEAQ, masym(c, base->str),
+				    areg(D_AX));
+			} else if (isglobal) {
+				ins2(c, A_MOVQ, masym(c, base->str),
+				    areg(D_AX));
+			} else if (bu && bu->kind == TY_ARRAY) {
 				ins2(c, A_LEAQ, amem(D_BP, boff), areg(D_AX));
 			} else {
 				ins2(c, A_MOVQ, amem(D_BP, boff), areg(D_AX));
@@ -3903,7 +3998,15 @@ cgexpr(Cg *c, Node *n, Local *locals)
 		} else if (base && base->kind == N_IDENT && bu &&
 		    (bu->kind == TY_SLICE || bu->kind == TY_STR)) {
 			int boff = localfind(locals, base->str);
-			ins2(c, A_MOVQ, amem(D_BP, boff + 8), areg(D_AX));
+			int isglobal = (boff == 0) && let_islet(base->str);
+			if (isglobal) {
+				ins2(c, A_LEAQ, masym(c, base->str),
+				    areg(D_CX));
+				ins2(c, A_MOVQ, amem(D_CX, 8), areg(D_AX));
+			} else {
+				ins2(c, A_MOVQ, amem(D_BP, boff + 8),
+				    areg(D_AX));
+			}
 		} else {
 			cgexpr_int(c, 0);
 		}
@@ -4933,7 +5036,7 @@ emit_lets(Cg *c, FILE *out, Node *file)
 			fputs("\"\n", out);
 			continue;
 		}
-		if (sz == 8) {
+		if (sz == 8 && !let_isarray(d->type)) {
 			u64 v = 0;
 			if (d->rhs != NULL) {
 				Node *r = d->rhs;
@@ -4974,9 +5077,67 @@ emit_lets(Cg *c, FILE *out, Node *file)
 			fprintf(out, "DATAR %s+0(SB),%s(SB)\n", sym, lab);
 			continue;
 		}
+		/* Array literal init: `let xs: [N]T = [v0, v1, ...];`. Walk
+		 * elements in declaration order; each must reduce to an
+		 * integer literal (casts are stripped). The trailing `...`
+		 * repeat marker fills remaining slots with the last value.
+		 * Falls through to zero-init if any element isn't a
+		 * constant we can evaluate at emit time. */
+		if (r != NULL && r->kind == N_ARRLIT && let_isarray(d->type)) {
+			Type *u = type_unwrap(d->type);
+			int esz = (u && u->sub) ? (int)u->sub->size : 1;
+			int alen = (u) ? (int)u->alen : 0;
+			u64 *vals = amalloc(c->a, sizeof(u64) * (size_t)alen);
+			int idx = 0;
+			int ok = 1;
+			u64 last = 0;
+			int repeat = 0;
+			for (Node *e = r->list; e && idx < alen; e = e->next) {
+				if (e->kind == N_FIELD && e->str &&
+				    strcmp(e->str, "...") == 0) {
+					repeat = 1;
+					break;
+				}
+				Node *ev = e;
+				while (ev && ev->kind == N_CAST) ev = ev->lhs;
+				if (ev == NULL) { ok = 0; break; }
+				if (ev->kind == N_INTLIT || ev->kind == N_RUNELIT) {
+					last = ev->uval;
+				} else if (ev->kind == N_TRUE) {
+					last = 1;
+				} else if (ev->kind == N_FALSE) {
+					last = 0;
+				} else if (ev->kind == N_NIL) {
+					last = 0;
+				} else {
+					ok = 0;
+					break;
+				}
+				vals[idx++] = last;
+			}
+			if (ok) {
+				if (repeat) {
+					while (idx < alen) vals[idx++] = last;
+				} else {
+					while (idx < alen) vals[idx++] = 0;
+				}
+				fprintf(out, "DATAW %s(SB),\"",
+				    mod_mangle(c, d->str));
+				for (int i = 0; i < alen; i++) {
+					u64 v = vals[i];
+					for (int b = 0; b < esz; b++) {
+						emit_data_byte(out,
+						    (u8)((v >> (b * 8)) & 0xff));
+					}
+				}
+				fputs("\"\n", out);
+				continue;
+			}
+			/* fall through to zero-init */
+		}
 		/* Otherwise: zero-init. str accepts nil / ""; struct
-		 * accepts no rhs at all; slice accepts nil; array accepts
-		 * no rhs (literal-array init isn't wired). */
+		 * accepts no rhs at all; slice accepts nil; array with no
+		 * literal init (or a non-constant one) zero-fills. */
 		if (r != NULL) {
 			int is_struct = let_isstruct(d->type);
 			int is_array  = let_isarray(d->type);

cmd/w6c/txt.c

@@ -31,9 +31,12 @@ anames(int op)
 	case A_END:	return "END";
 	case A_MOVQ:	return "MOVQ";
 	case A_MOVL:	return "MOVL";
+	case A_MOVW:	return "MOVW";
 	case A_MOVB:	return "MOVB";
 	case A_MOVZBQ:	return "MOVZBQ";
+	case A_MOVZWQ:	return "MOVZWQ";
 	case A_MOVSXD:	return "MOVSXD";
+	case A_MOVSWQ:	return "MOVSWQ";
 	case A_MOVSD:	return "MOVSD";
 	case A_ADDSD:	return "ADDSD";
 	case A_SUBSD:	return "SUBSD";