Hojun-Cho/ww
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

test: migrate 948_idx_compound to @test + runww rejects, retire C twin (fold-3)

Browse Source 
#133 indexed-scalar compound-assign. The 21 rows split by observability:
18 value rows -> test/lang/idx_compound_test.ww (one @test fn each,
primitive-only asserts, slot-poison + neighbor-unchanged read-back);
3 reject rows -> test/wcc/data/idx_compound_{float_indexed,str_indexed,
chained_ptr_float}/case.ww as //ww:error, asserting BOTH stages reject on
the shared diagnostic body (cstage's leading prefix excluded). The C twin
is retired; its coverage is a strict superset of the original rows.

First reject-bearing fold-3 migration -- validates the runww dual-stage
home end to end. LANGBYTEID_EXPECTED_MIN 49 -> 50.
This commit is contained in:
Hojun-Cho
2026-06-22 16:02:01 +09:00
parent e57fcf230b
commit af3c49a4c7
6 changed files with 180 additions and 428 deletions
Download Patch File Download Diff File Expand all files Collapse all files

421
test/wcc/948_idx_compound_run.c
View File

@@ -1,421 +0,0 @@
/*
* 948_idx_compound_run — runtime + byte-id net for #133: a compound
* assign on an indexed lvalue (`arr[i] OP= v`) must do a real
* LOAD-OP-STORE, not silently demote `OP=` to `=` (cstage's prior
* behaviour) and not silently emit NOTHING (wwstage's prior behaviour).
*
* Pre-fix:
* - cstage cgen.c N_ASSIGN N_INDEX-lhs branch (3699-3851) did NOT gate
* on `n->op == TK_ASSIGN`; every compound op fell through and
* emitted a plain store of the RHS — silent demotion of `arr[i] +=
* 1` to `arr[i] = 1`.
* - wwstage cgenexpr.ww cgassign N_INDEX-lhs branch (4117-4344) had an
* explicit `if (n.op == tkind.TK_ASSIGN)` outer gate with no else —
* non-ASSIGN ops emitted nothing at all (silent no-op).
*
* Both stages were runtime-WRONG; the fix adds a real load-op-store arm
* to both stages, mirroring the chained-pointer-field compound template
* at cgen.c:3281-3317.
*
* Each row carries (a) a cstage `ww build` + run asserting the exit
* code and (b) a w6c vs w6c_ww `.s` cmp (rule-10 byte-id). The wide
* matrix exercises every compound op the template wires (+= -= *= &=
* |= ^=) on the narrow/wide element widths the helpers must dispatch
* (u8, i8, u32, i32, i64), with both bare-array and slice bases.
* float/str/slice/tagged element compound stays explicitly unwired (the
* cstage template never wired them either — separate follow-up). A
* plain-assign control row asserts the byte-id surface for the ASSIGN
* path is unchanged by the fix.
*/
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <unistd.h>
#include <sys/stat.h>
#include <sys/wait.h>
static int
runwait(const char *cmd)
{
int rc = system(cmd);
if (rc == -1) return -1;
if (WIFEXITED(rc)) return WEXITSTATUS(rc);
return -1;
}
/* builderr + experr: when builderr != 0 the cstage build MUST FAIL and
* stderr MUST contain experr. wwstage builderr is verified via direct
* w6c_ww invocation on the same source. Mirrors 945_tuple_nary's pattern
* for loud-stop verification (rule 7 — never silent). */
struct row { const char *label; const char *src; int want_exit;
int builderr; const char *experr; };
static const struct row rows[] = {
/* u8 += : was silently demoted to `=` in cstage (exit 1, the
* post-init value), silently dropped in wwstage (exit 10, the
* init value untouched). Post-fix: 10 + 1 = 11. */
{ "u8_pluseq",
"package main;\n"
"export fn main() i32 = {\n"
" let a: [4]u8 = [10u8, 20u8, 30u8, 40u8];\n"
" a[0] += 1u8;\n"
" return a[0]: i32;\n"
"};\n", 11, 0, NULL },
/* u8 -= : 30 - 5 = 25. */
{ "u8_minuseq",
"package main;\n"
"export fn main() i32 = {\n"
" let a: [4]u8 = [10u8, 20u8, 30u8, 40u8];\n"
" a[2] -= 5u8;\n"
" return a[2]: i32;\n"
"};\n", 25, 0, NULL },
/* u8 *= : 7 * 3 = 21. */
{ "u8_stareq",
"package main;\n"
"export fn main() i32 = {\n"
" let a: [4]u8 = [7u8, 0u8, 0u8, 0u8];\n"
" a[0] *= 3u8;\n"
" return a[0]: i32;\n"
"};\n", 21, 0, NULL },
/* u8 &= : 0xF3 & 0x0F = 0x03. Bitwise on the narrow width matters
* for the high-bit-set case the silent demote would clobber. */
{ "u8_ampeq",
"package main;\n"
"export fn main() i32 = {\n"
" let a: [4]u8 = [0xF3u8, 0u8, 0u8, 0u8];\n"
" a[0] &= 0x0Fu8;\n"
" return a[0]: i32;\n"
"};\n", 3, 0, NULL },
/* u8 |= : 0x10 | 0x07 = 0x17. */
{ "u8_pipeeq",
"package main;\n"
"export fn main() i32 = {\n"
" let a: [4]u8 = [0x10u8, 0u8, 0u8, 0u8];\n"
" a[0] |= 0x07u8;\n"
" return a[0]: i32;\n"
"};\n", 23, 0, NULL },
/* u8 ^= : 0xAA ^ 0xFF = 0x55. */
{ "u8_careteq",
"package main;\n"
"export fn main() i32 = {\n"
" let a: [4]u8 = [0xAAu8, 0u8, 0u8, 0u8];\n"
" a[0] ^= 0xFFu8;\n"
" return a[0]: i32;\n"
"};\n", 85, 0, NULL },
/* i32 += : exercises the MOVSXD load + MOVL store the localloadop
* dispatch picks for narrow signed elements (load extends, store
* truncates). 100 + 50 = 150. */
{ "i32_pluseq",
"package main;\n"
"export fn main() i32 = {\n"
" let a: [4]i32 = [100, 200, 300, 400];\n"
" a[1] += 50;\n"
" return a[1];\n"
"};\n", 250, 0, NULL },
/* i64 += : full-width control. 100 + 34 = 134 (kept <256 since
* Unix exit codes are 8-bit). */
{ "i64_pluseq",
"package main;\n"
"export fn main() i32 = {\n"
" let a: [4]i64 = [100i64, 200i64, 300i64, 400i64];\n"
" a[0] += 34i64;\n"
" return a[0]: i32;\n"
"};\n", 134, 0, NULL },
/* Non-zero index: a[3] += 7 — exercises the scaled-index path
* (esz*idx) for u32 element. 100 + 7 = 107. */
{ "u32_idx3_pluseq",
"package main;\n"
"export fn main() i32 = {\n"
" let a: [4]u32 = [10u32, 20u32, 50u32, 100u32];\n"
" a[3] += 7u32;\n"
" return a[3]: i32;\n"
"};\n", 107, 0, NULL },
/* Slice base: same shape through a []u8 view. 22 + 8 = 30. */
{ "slice_pluseq",
"package main;\n"
"export fn main() i32 = {\n"
" let buf: [4]u8 = [11u8, 22u8, 33u8, 44u8];\n"
" let s: []u8 = buf[0:4];\n"
" s[1] += 8u8;\n"
" return s[1]: i32;\n"
"};\n", 30, 0, NULL },
/* Plain `arr[i] = v` control: the ASSIGN path must be unchanged by
* the fix (byte-id preserved on the legacy surface). */
{ "plain_assign_ctrl",
"package main;\n"
"export fn main() i32 = {\n"
" let a: [4]u8 = [10u8, 20u8, 30u8, 40u8];\n"
" a[1] = 99u8;\n"
" return a[1]: i32;\n"
"};\n", 99, 0, NULL },
/* #133-expanded: SLASHEQ/PERCENTEQ/LSHIFTEQ/RSHIFTEQ on indexed
* scalar elements. Pre-expansion both stages silently identity-
* stored (load, pop RHS, store ORIGINAL — RHS discarded). Width-
* dispatch via fldloadop/fldstoreop; signedness via type_isunsigned
* picks IDIV/SAR (signed) vs DIV/SHR (unsigned). Note: signed
* RSHIFTEQ uses SHRQ in parity with cgen.c:4034 (A_SARQ not in w6a;
* pre-existing concern). */
/* signed i32 /=: 100 / 4 = 25 (positive, no signed/unsigned diff). */
{ "i32_slasheq",
"package main;\n"
"export fn main() i32 = {\n"
" let a: [4]i32 = [100, 200, 300, 400];\n"
" a[0] /= 4;\n"
" return a[0];\n"
"};\n", 25, 0, NULL },
/* unsigned u32 /=: 100u32 / 4u32 = 25u32. Routes through DIVQ +
* zero-DX (NOT CQO+IDIVQ — signed-divide of a high-bit-set u32
* narrow-load would mis-treat the operand as negative). */
{ "u32_slasheq",
"package main;\n"
"export fn main() i32 = {\n"
" let a: [4]u32 = [100u32, 200u32, 300u32, 400u32];\n"
" a[0] /= 4u32;\n"
" return a[0]: i32;\n"
"};\n", 25, 0, NULL },
/* signed i32 %=: 17 % 5 = 2; result rides DX, MOVQ DX,AX to land
* in AX for the store. */
{ "i32_percenteq",
"package main;\n"
"export fn main() i32 = {\n"
" let a: [4]i32 = [17, 0, 0, 0];\n"
" a[0] %= 5;\n"
" return a[0];\n"
"};\n", 2, 0, NULL },
/* unsigned u32 %=: 100u32 % 7u32 = 2u32. */
{ "u32_percenteq",
"package main;\n"
"export fn main() i32 = {\n"
" let a: [4]u32 = [100u32, 0u32, 0u32, 0u32];\n"
" a[0] %= 7u32;\n"
" return a[0]: i32;\n"
"};\n", 2, 0, NULL },
/* i32 <<=: 3 << 4 = 48. SHLQ via CX. */
{ "i32_lshifteq",
"package main;\n"
"export fn main() i32 = {\n"
" let a: [4]i32 = [3, 0, 0, 0];\n"
" a[0] <<= 4;\n"
" return a[0];\n"
"};\n", 48, 0, NULL },
/* unsigned u32 >>=: 200u32 >> 2 = 50u32. SHRQ via CX. */
{ "u32_rshifteq",
"package main;\n"
"export fn main() i32 = {\n"
" let a: [4]u32 = [200u32, 0u32, 0u32, 0u32];\n"
" a[0] >>= 2u32;\n"
" return a[0]: i32;\n"
"};\n", 50, 0, NULL },
/* signed i32 >>=: 200 >> 2 = 50 (positive, parity with SHRQ —
* A_SARQ unimplemented in w6a; pre-existing signed-RSHIFT on
* negatives subtle, out of scope for #133). */
{ "i32_rshifteq_pos",
"package main;\n"
"export fn main() i32 = {\n"
" let a: [4]i32 = [200, 0, 0, 0];\n"
" a[0] >>= 2;\n"
" return a[0];\n"
"};\n", 50, 0, NULL },
/* HARD-ERROR rows (#133-expanded rule-7): float / str / slice /
* tagged element compound builds MUST FAIL LOUD on both stages
* with the cited diagnostic substring. Pre-expansion these were
* silent fall-through-to-default-break → silent miscompile.
* Verification: cstage build returns non-zero AND stderr carries
* the substring; wwstage same via w6c_ww direct invocation. */
{ "he_float_indexed",
"package main;\n"
"export fn main() i32 = {\n"
" let a: [4]f64 = [1.0, 2.0, 3.0, 4.0];\n"
" a[0] += 1.5;\n"
" return 0;\n"
"};\n", 0, 1, "indexed-lvalue compound on float element" },
{ "he_str_indexed",
"package main;\n"
"export fn main() i32 = {\n"
" let a: [4]str = [\"a\", \"b\", \"c\", \"d\"];\n"
" a[0] += \"x\";\n"
" return 0;\n"
"};\n", 0, 1, "indexed-lvalue compound on" },
{ "he_float_chained_ptr",
"package main;\n"
"type t = struct { v: f64 };\n"
"type w = struct { i: *t };\n"
"fn bad(d: *w) void = { d.i.v += 1.5; };\n"
"export fn main() i32 = { return 0; };\n",
0, 1, "chained-ptr-field compound on float element" },
{ NULL, NULL, 0, 0, NULL }
};
static int
slurp_eq(const char *a, const char *b)
{
FILE *fa = fopen(a, "rb");
FILE *fb = fopen(b, "rb");
if (!fa || !fb) { if (fa) fclose(fa); if (fb) fclose(fb); return -1; }
int rc = 0;
for (;;) {
int ca = fgetc(fa);
int cb = fgetc(fb);
if (ca != cb) { rc = -1; break; }
if (ca == EOF) break;
}
fclose(fa); fclose(fb);
return rc;
}
int
main(void)
{
const char *bin = getenv("BIN");
if (!bin) bin = "out/bin";
char absbin[1024];
if (bin[0] != '/') {
char cwd[1024];
if (getcwd(cwd, sizeof cwd) == NULL) return 1;
snprintf(absbin, sizeof absbin, "%s/%s", cwd, bin);
bin = absbin;
}
char w6c[1100], w6c_ww[1100];
snprintf(w6c, sizeof w6c, "%s/w6c", bin);
snprintf(w6c_ww, sizeof w6c_ww, "%s/w6c_ww", bin);
if (access(w6c_ww, X_OK) != 0) {
fprintf(stderr, "idxcompound: w6c_ww missing — cannot run the "
"cs==ww byte-id gate (the whole point of this test)\n");
return 1;
}
int n = 0, fail = 0;
for (int i = 0; rows[i].src; i++, n++) {
char src[64];
snprintf(src, sizeof src, "/tmp/wwidx_%d_%d.ww", getpid(), i);
FILE *f = fopen(src, "wb");
if (f == NULL) { fail++; continue; }
fputs(rows[i].src, f);
fclose(f);
/* (a) cstage build + run, OR build-must-fail (builderr rows).
* For builderr: stderr captured to a temp file; pass iff
* exit-nonzero AND stderr contains experr substring. */
char tmpdir[64];
snprintf(tmpdir, sizeof tmpdir, "/tmp/wwidx_%d_d_%d",
getpid(), i);
mkdir(tmpdir, 0755);
char cmd[2048];
if (rows[i].builderr) {
char errf[96];
snprintf(errf, sizeof errf, "/tmp/wwidx_%d_e_%d",
getpid(), i);
snprintf(cmd, sizeof cmd,
"cd %s && %s/ww build %s >/dev/null 2>%s",
tmpdir, bin, src, errf);
int brc = runwait(cmd);
FILE *ef = fopen(errf, "rb");
char ebuf[4096];
size_t en = 0;
if (ef) { en = fread(ebuf, 1, sizeof ebuf - 1, ef);
fclose(ef); }
ebuf[en] = '\0';
int ok = (brc != 0)
&& (rows[i].experr == NULL
|| strstr(ebuf, rows[i].experr) != NULL);
if (!ok) {
fprintf(stderr, "row[%s]: cstage expected "
"builderr+'%s' (brc=%d, stderr='%s')\n",
rows[i].label,
rows[i].experr ? rows[i].experr : "(any)",
brc, ebuf);
fail++;
}
/* Also verify wwstage hard-errors with the SAME message
* (rule-10 — both stages identical diagnostic). Invoke
* w6c_ww directly on the .ww source. */
snprintf(cmd, sizeof cmd,
"%s -o /dev/null %s >/dev/null 2>%s",
w6c_ww, src, errf);
int wrc = runwait(cmd);
ef = fopen(errf, "rb"); en = 0;
if (ef) { en = fread(ebuf, 1, sizeof ebuf - 1, ef);
fclose(ef); }
ebuf[en] = '\0';
int wok = (wrc != 0)
&& (rows[i].experr == NULL
|| strstr(ebuf, rows[i].experr) != NULL);
if (!wok) {
fprintf(stderr, "row[%s]: wwstage expected "
"builderr+'%s' (wrc=%d, stderr='%s')\n",
rows[i].label,
rows[i].experr ? rows[i].experr : "(any)",
wrc, ebuf);
fail++;
}
unlink(errf);
unlink(src); rmdir(tmpdir);
continue;
}
snprintf(cmd, sizeof cmd, "cd %s && %s/ww build %s",
tmpdir, bin, src);
if (runwait(cmd) != 0) {
fprintf(stderr, "row[%s]: cstage build failed\n",
rows[i].label);
fail++;
unlink(src); rmdir(tmpdir);
continue;
}
char outbin[128];
const char *base = strrchr(src, '/');
base = base ? base + 1 : src;
snprintf(outbin, sizeof outbin, "%s/%s", tmpdir, base);
char *dot = strrchr(outbin, '.');
if (dot && strcmp(dot, ".ww") == 0) *dot = '\0';
int got = runwait(outbin);
if (got != rows[i].want_exit) {
fprintf(stderr, "row[%s]: cstage exit %d, want %d\n",
rows[i].label, got, rows[i].want_exit);
fail++;
}
unlink(outbin); rmdir(tmpdir);
/* (b) cs==ww byte-id gate. */
char cs_s[64], ws_s[64];
snprintf(cs_s, sizeof cs_s, "/tmp/wwidx_%d_%d_cs.s",
getpid(), i);
snprintf(ws_s, sizeof ws_s, "/tmp/wwidx_%d_%d_ww.s",
getpid(), i);
snprintf(cmd, sizeof cmd, "%s -o %s %s 2>/dev/null",
w6c, cs_s, src);
if (runwait(cmd) != 0) {
fprintf(stderr, "row[%s]: w6c failed\n", rows[i].label);
fail++; unlink(src); continue;
}
snprintf(cmd, sizeof cmd, "%s -o %s %s 2>/dev/null",
w6c_ww, ws_s, src);
if (runwait(cmd) != 0) {
fprintf(stderr, "row[%s]: w6c_ww failed\n",
rows[i].label);
fail++; unlink(src); unlink(cs_s); continue;
}
if (slurp_eq(cs_s, ws_s) != 0) {
fprintf(stderr,
"row[%s]: cstage/wwstage .s DIFFER (rule-10 "
"byte-id violation)\n", rows[i].label);
fail++;
}
unlink(src); unlink(cs_s); unlink(ws_s);
}
if (fail) {
fprintf(stderr, "%d/%d idx-compound tests failed\n",
fail, n);
return 1;
}
printf("idxcompound: %d/%d ok (cstage run + cs==ww byte-id)\n",
n, n);
return 0;
}

12
test/wcc/data/idx_compound_chained_ptr_float/case.ww Normal file
View File

@@ -0,0 +1,12 @@
//ww:error "chained-ptr-field compound on float element not wired (#133/rule-7)"
// Lifted from test/wcc/948_idx_compound_run.c reject row "he_float_chained_ptr"
// (#133-expanded rule-7): a compound assign on a chained-pointer FLOAT field
// (d.i.v += ...) is unwired in both stages and MUST loud-fail. The substring is
// the shared diagnostic body up to "(#133/rule-7)" — cstage appends an extra
// "; field='v'" that wwstage omits, so the cited body is the most specific form
// present on BOTH stages (no file:line / "ww: " prefix, which differ cs vs ww).
package main;
type t = struct { v: f64 };
type w = struct { i: *t };
fn bad(d: *w) void = { d.i.v += 1.5; };
export fn main() i32 = { return 0; };

13
test/wcc/data/idx_compound_float_indexed/case.ww Normal file
View File

@@ -0,0 +1,13 @@
//ww:error "indexed-lvalue compound on float element not wired (#133/rule-7)"
// Lifted from test/wcc/948_idx_compound_run.c reject row "he_float_indexed"
// (#133-expanded rule-7): a compound assign on an indexed FLOAT element is
// unwired in both stages and MUST loud-fail, not silently fall through to the
// default break (silent miscompile). The substring is the FULL shared
// diagnostic body — byte-identical on both stages (no file:line prefix, no
// cstage "ww: " prefix — both differ cs vs ww).
package main;
export fn main() i32 = {
let a: [4]f64 = [1.0, 2.0, 3.0, 4.0];
a[0] += 1.5;
return 0;
};

13
test/wcc/data/idx_compound_str_indexed/case.ww Normal file
View File

@@ -0,0 +1,13 @@
//ww:error "indexed-lvalue compound on str element not wired (#133/rule-7)"
// Lifted from test/wcc/948_idx_compound_run.c reject row "he_str_indexed"
// (#133-expanded rule-7): a compound assign on an indexed STR element is
// unwired in both stages and MUST loud-fail. The substring is the FULL shared
// diagnostic body — byte-identical on both stages — pinned to "str element" so
// it cannot also match the float row (no file:line / "ww: " prefix, which
// differ cs vs ww).
package main;
export fn main() i32 = {
let a: [4]str = ["a", "b", "c", "d"];
a[0] += "x";
return 0;
};