wcc: struct-param float fields via SSE arg regs (#165)
struct params were passed GP-only, so a struct{f64,f64} argument landed in
DI/SI instead of X0/X1 — value-correct for internal ww calls (the bits
round-trip) but not SysV register-class conformant. Add a per-eightbyte
classifier (struct_float_class) routing a qualifying struct's float eightbytes
through the SSE arg cursor, reusing #163's dual-cursor plumbing and #164's
field classification. A struct qualifies only when every eightbyte is
pure-integer or a lone f64 exactly filling it (and >=1 f64); anything else —
any f32, multiple floats per eightbyte, a straddling or aggregate field —
falls back to the unchanged GP path (f32 sub-eightbyte packing deferred #165b).
Both stages' predicates are alias-aware and identical in coverage.
Gate-blind and value-correct either way, so the discriminator is the callee's
receive instruction (MOVSD vs MOVQ), scoped per-function — covered by probe
946.
This commit is contained in:
308
test/wcc/946_structparam_run.c
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308
test/wcc/946_structparam_run.c
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@@ -0,0 +1,308 @@
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/*
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* 946_structparam_run — runtime + byte-id + asm-pattern net for #165, the
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* float-bearing struct-PARAM SysV ABI (the param twin of #171's struct
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* RETURN, and the struct counterpart of #163's per-element tuple PARAM).
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*
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* THE BUG (#165, cs==ww but SysV-non-conformant on master): struct args
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* ARE handled but GP-ONLY — the cgcall pop drained every struct eightbyte
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* into the INTEGER arg regs (DI/SI/..) and the callee cgfnparams receive
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* MOVQ'd them back from the same GP regs. So a `struct { a: f64, b: f64 }`
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* arg landed in DI/SI instead of X0/X1. For a pure INTERNAL ww call (both
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* ends compiled by the same stage) the f64 bits still round-trip through
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* the GP regs intact, so the runtime VALUE was correct AND both stages
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* were symmetric-GP — the cs==ww gate and a value check are therefore
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* NECESSARY-NOT-SUFFICIENT here (cf. 907_f32arg_run, same situation). The
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* genuine defect is SysV register-CLASS conformance, observable only in
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* the emitted asm (and at a real ABI boundary). The discriminating
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* dimension is therefore the asm pattern (c) below.
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*
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* THE FIX: per-EIGHTBYTE SysV classification (structs classify per
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* eightbyte, unlike #163's per-element tuples). Each 8-byte eightbyte that
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* is a lone f64 rides the SSE arg cursor (X0..X7); a pure-INTEGER eightbyte
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* rides the INTEGER cursor (DI/SI/..). SEND (cgcall pop) MOVSD's the float
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* eightbyte off (SP) into the next XMM; RECV (cgfnparams) MOVSD's the XMM
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* into the param slot. Symmetric across cstage (cmd/w6c/cgen.c
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* struct_float_class + the cgcall pop arm + cgfnparams) and wwstage
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* (cgenutil.ww structfloatclass + cgenexpr.ww cgcall pop + cgendecl.ww).
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*
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* THE FALLBACK GATE: only a struct whose every eightbyte is pure-INT or a
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* lone f64 qualifies. An f32 field packs two f32 into ONE SSE eightbyte
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* (needs packing — deferred #165b); a naive per-field reuse would WRONGLY
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* route its two f32 to two SSE regs. struct{f32,f32} therefore STAYS on
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* the GP transport (correct + byte-identical current behavior). The
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* f32f32 row asserts BOTH the correct round-tripped value AND the ABSENCE
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* of an SSE receive, proving the gate caught it.
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*
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* Each row carries THREE dimensions:
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* (a) cstage `ww build` + run — exit code (end-to-end round-trip).
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* (b) w6c vs w6c_ww `.s` cmp — rule-10 byte-id (both stages identical).
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* (c) asm-pattern on the CALLEE function's receive: a lone-f64 eightbyte
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* is received `MOVSD Xn, -off(BP)` (XMM -> slot); a GP eightbyte is
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* `MOVQ DI, ...`. The marker is scoped to the callee `main.use` text
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* (main's float-literal init also emits `MOVSD X0, -off(BP)`, so a
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* whole-file grep would not discriminate). PRESENT for the SSE-routed
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* rows, ABSENT for the GP / fallback rows. A pre-fix (or GP-regressed)
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* build receives every struct eightbyte via MOVQ -> marker absent,
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* which is exactly what (c) catches.
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*/
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include <unistd.h>
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#include <sys/stat.h>
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#include <sys/wait.h>
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static int
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runwait(const char *cmd)
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{
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int rc = system(cmd);
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if (rc == -1) return -1;
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if (WIFEXITED(rc)) return WEXITSTATUS(rc);
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return -1;
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}
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struct row {
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const char *label;
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const char *src;
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int want_exit;
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int want_sse; /* 1 = callee must receive an f64 eightbyte via XMM */
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};
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static const struct row rows[] = {
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/* HEADLINE — struct{f64,f64}. Both eightbytes lone f64 -> X0,X1. The
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* callee receives `MOVSD X0, slot` + `MOVSD X1, slot`. s.a+s.b = 8.0. */
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{ "f64f64_arg",
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"package main;\n"
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"type pff = struct { a: f64, b: f64 };\n"
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"fn use(s: pff) f64 = { return s.a + s.b; };\n"
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"export fn main() i32 = {\n"
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"\tlet s: pff = pff { a = 3.0, b = 5.0 };\n"
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"\tif (use(s) != 8.0) { return 1; };\n"
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"\treturn 0;\n"
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"};\n", 0, 1 },
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/* struct{f64,i64} — eb0 lone f64 (X0), eb1 pure-INT (DI). Class is
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* independent of eightbyte position. (s.a:i64)+s.b = 3+5 = 8. */
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{ "f64i64_arg",
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"package main;\n"
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"type pfi = struct { a: f64, b: i64 };\n"
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"fn use(s: pfi) i64 = { return (s.a: i64) + s.b; };\n"
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"export fn main() i32 = {\n"
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"\tlet s: pfi = pfi { a = 3.0, b = 5 };\n"
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"\tif (use(s) != 8) { return 1; };\n"
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"\treturn 0;\n"
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"};\n", 0, 1 },
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/* struct{i64,f64} — order-swap: eb0 pure-INT (DI), eb1 lone f64 (X0,
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* the first float still gets X0). Confirms the float lands in the next
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* XMM regardless of position. s.a + (s.b:i64) = 3+5 = 8. */
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{ "i64f64_arg",
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"package main;\n"
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"type pif = struct { a: i64, b: f64 };\n"
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"fn use(s: pif) i64 = { return s.a + (s.b: i64); };\n"
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"export fn main() i32 = {\n"
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"\tlet s: pif = pif { a = 3, b = 5.0 };\n"
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"\tif (use(s) != 8) { return 1; };\n"
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"\treturn 0;\n"
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"};\n", 0, 1 },
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/* GP REGRESSION — struct{i64,i64}: every eightbyte pure-INT, no float
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* to route, so it STAYS on the GP transport unchanged (the in-tree
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* byte-id case). Callee receives via MOVQ DI/SI -> no SSE marker. */
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{ "i64i64_arg",
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"package main;\n"
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"type pii = struct { a: i64, b: i64 };\n"
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"fn use(s: pii) i64 = { return s.a + s.b; };\n"
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"export fn main() i32 = {\n"
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"\tlet s: pii = pii { a = 3, b = 5 };\n"
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"\tif (use(s) != 8) { return 1; };\n"
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"\treturn 0;\n"
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"};\n", 0, 0 },
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/* FALLBACK GATE — struct{f32,f32}: two f32 pack into ONE SSE eightbyte
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* (8B struct). The gate rejects f32, so the struct stays GP-routed
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* (received via MOVQ DI). The value still round-trips (the 8B MOVQ
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* carries both f32) -> (s.a:i64)+(s.b:i64) = 3+5 = 8. Asserts BOTH the
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* correct value AND no SSE receive, proving the gate caught it (NOT
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* routed to 2 SSE regs). The 2-f32-per-eightbyte packing is #165b. */
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{ "f32f32_arg_fallback",
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"package main;\n"
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"type pf32 = struct { a: f32, b: f32 };\n"
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"fn use(s: pf32) i64 = { return (s.a: i64) + (s.b: i64); };\n"
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"export fn main() i32 = {\n"
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"\tlet s: pf32 = pf32 { a = 3.0f32, b = 5.0f32 };\n"
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"\tif (use(s) != 8) { return 1; };\n"
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"\treturn 0;\n"
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"};\n", 0, 0 },
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/* CURSOR INDEPENDENCE — i64 scalar + struct{f64,f64}. n->DI (INTEGER
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* cursor), s.a->X0, s.b->X1 (SSE cursor), independent counters.
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* n + s.a + s.b = 2+3+5 = 10. SSE receive present. */
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{ "scalar_plus_f64f64",
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"package main;\n"
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"type pff = struct { a: f64, b: f64 };\n"
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"fn use(n: i64, s: pff) i64 = {\n"
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"\treturn n + (s.a: i64) + (s.b: i64);\n"
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"};\n"
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"export fn main() i32 = {\n"
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"\tlet s: pff = pff { a = 3.0, b = 5.0 };\n"
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"\tif (use(2, s) != 10) { return 1; };\n"
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"\treturn 0;\n"
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"};\n", 0, 1 },
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{ NULL, NULL, 0, 0 }
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};
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static int
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slurp_eq(const char *a, const char *b)
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{
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FILE *fa = fopen(a, "rb");
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FILE *fb = fopen(b, "rb");
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if (!fa || !fb) { if (fa) fclose(fa); if (fb) fclose(fb); return -1; }
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int rc = 0;
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for (;;) {
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int ca = fgetc(fa);
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int cb = fgetc(fb);
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if (ca != cb) { rc = -1; break; }
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if (ca == EOF) break;
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}
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fclose(fa); fclose(fb);
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return rc;
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}
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/* Does the callee `main.use` receive an f64 eightbyte via an XMM reg?
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* Isolate that function's text (its receive of an SSE eightbyte is the
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* only `MOVSD Xn, -off(BP)` store-to-slot in it; the body of these probes
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* stores no f64 local, and main's float-literal init — also a
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* `MOVSD X0, -off(BP)` — lives in a different function), then look for an
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* XMM-source store to a negative BP offset. Returns 1/0, or -1 on error. */
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static int
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callee_receives_sse(const char *path)
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{
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FILE *f = fopen(path, "rb");
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if (!f) return -1;
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static char buf[1 << 18];
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size_t n = fread(buf, 1, sizeof buf - 1, f);
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fclose(f);
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buf[n] = '\0';
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char *start = strstr(buf, "TEXT main.use");
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if (!start) return -1;
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char *end = strstr(start + 1, "\nTEXT ");
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if (end) *end = '\0';
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/* `MOVSD\tX0, -` is the receive of the first (or only) f64 eightbyte;
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* a GP-routed struct never emits it (MOVQ DI instead). */
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return strstr(start, "MOVSD\tX0, -") != NULL ? 1 : 0;
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}
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int
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main(void)
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{
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const char *bin = getenv("BIN");
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if (!bin) bin = "out/bin";
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char absbin[2200];
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if (bin[0] != '/') {
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char cwd[1024];
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if (getcwd(cwd, sizeof cwd) == NULL) return 1;
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snprintf(absbin, sizeof absbin, "%s/%s", cwd, bin);
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bin = absbin;
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}
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char w6c[2300], w6c_ww[2300];
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snprintf(w6c, sizeof w6c, "%s/w6c", bin);
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snprintf(w6c_ww, sizeof w6c_ww, "%s/w6c_ww", bin);
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if (access(w6c_ww, X_OK) != 0) {
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fprintf(stderr, "structparam: w6c_ww missing — cannot run the "
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"cs==ww byte-id gate\n");
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return 1;
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}
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int n = 0, fail = 0;
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for (int i = 0; rows[i].src; i++, n++) {
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char src[64];
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snprintf(src, sizeof src, "/tmp/wwstp_%d_%d.ww", getpid(), i);
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FILE *f = fopen(src, "wb");
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if (f == NULL) { fail++; continue; }
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fputs(rows[i].src, f);
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fclose(f);
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char cmd[4096];
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/* (a) cstage build + run in a scratch dir. */
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char tmpdir[64];
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snprintf(tmpdir, sizeof tmpdir, "/tmp/wwstp_%d_d_%d",
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getpid(), i);
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mkdir(tmpdir, 0755);
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snprintf(cmd, sizeof cmd, "cd %s && %s/ww build %s",
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tmpdir, bin, src);
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if (runwait(cmd) != 0) {
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fprintf(stderr, "row[%s]: cstage build failed\n",
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rows[i].label);
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fail++;
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unlink(src); rmdir(tmpdir);
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continue;
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}
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char outbin[128];
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const char *base = strrchr(src, '/');
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base = base ? base + 1 : src;
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snprintf(outbin, sizeof outbin, "%s/%s", tmpdir, base);
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char *dot = strrchr(outbin, '.');
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if (dot && strcmp(dot, ".ww") == 0) *dot = '\0';
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int got = runwait(outbin);
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if (got != rows[i].want_exit) {
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fprintf(stderr, "row[%s]: cstage exit %d, want %d\n",
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rows[i].label, got, rows[i].want_exit);
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fail++;
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}
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unlink(outbin); rmdir(tmpdir);
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/* (b) cs==ww byte-id gate: emit .s from both stages, cmp. */
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char cs_s[64], ws_s[64];
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snprintf(cs_s, sizeof cs_s, "/tmp/wwstp_%d_%d_cs.s",
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getpid(), i);
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snprintf(ws_s, sizeof ws_s, "/tmp/wwstp_%d_%d_ww.s",
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getpid(), i);
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snprintf(cmd, sizeof cmd, "%s -o %s %s 2>/dev/null",
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w6c, cs_s, src);
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if (runwait(cmd) != 0) {
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fprintf(stderr, "row[%s]: w6c failed\n", rows[i].label);
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fail++; unlink(src); continue;
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}
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snprintf(cmd, sizeof cmd, "%s -o %s %s 2>/dev/null",
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w6c_ww, ws_s, src);
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if (runwait(cmd) != 0) {
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fprintf(stderr, "row[%s]: w6c_ww failed\n",
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rows[i].label);
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fail++; unlink(src); unlink(cs_s); continue;
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}
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if (slurp_eq(cs_s, ws_s) != 0) {
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fprintf(stderr,
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"row[%s]: cstage/wwstage .s DIFFER (rule-10 "
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"byte-id violation)\n", rows[i].label);
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fail++;
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}
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/* (c) asm-pattern discriminator on the callee receive. byte-id
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* (b) proves ww_s mirrors cs_s, so checking cs_s suffices. */
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int sse = callee_receives_sse(cs_s);
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if (sse < 0) {
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fprintf(stderr, "row[%s]: cannot scan callee .s\n",
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rows[i].label);
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fail++;
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} else if (sse != rows[i].want_sse) {
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fprintf(stderr,
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"row[%s]: callee SSE receive %s, want %s "
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"(register-class discriminator)\n",
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rows[i].label, sse ? "present" : "absent",
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rows[i].want_sse ? "present" : "absent");
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fail++;
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}
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unlink(src); unlink(cs_s); unlink(ws_s);
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}
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if (fail) {
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fprintf(stderr, "%d/%d struct-param tests failed\n", fail, n);
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return 1;
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}
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printf("structparam: %d/%d ok (cstage run + cs==ww byte-id + "
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"SSE-receive asm)\n", n, n);
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return 0;
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}
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Reference in New Issue
Block a user