wcc/cgen: GAP-A.len def-global array .len — def-twin cgdot arm (#7 lineage, wwstage align-up)
wwstage .len on a def-global array fell to the cgdot SB-fallback (w6l: undefined reference to 'len') — the #7 let-array arm gates on letvartnode (c.lets only), so def-globals (c.defs) missed it. Add a def .len-only arm in cgdot using the existing defvartnode (the def-side mirror of letvartnode), emitting the length immediate from the #11-stamped N_TARRAY length child. cstage cgen.c was already correct, so this is a wwstage-only source change: w6c unchanged, w6c_ww + wwdump regen'd (they embed the wcc cgen). .ptr (cstage itself buggy — emits LEAQ (BP), filed GAP-A.ptr) and .cap (wwstage silent garbage; arrays have no cap, filed GAP-A.cap) are NOT folded (rule-11, separate concerns). Pin: table-driven test/wcc/816_def_arr_len (def [3] + [_] inferred + 1-elem + u8 stride .len, both stages + byte-id), teeth-proven.
This commit is contained in:
7
Makefile
7
Makefile
@@ -244,6 +244,7 @@ TESTS = $(BIN)/test_smoke $(BIN)/test_lex $(BIN)/test_parse $(BIN)/test_check \
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$(BIN)/test_arr_tagged_elem \
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$(BIN)/test_arr_infer_len \
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$(BIN)/test_def_arr_infer_len \
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$(BIN)/test_def_arr_len \
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$(BIN)/test_slice_str_global_zero \
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$(BIN)/test_slice_literal_global \
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$(BIN)/test_global_arr_elem_field \
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@@ -640,6 +641,12 @@ $(BIN)/test_def_arr_infer_len: test/wcc/814_def_arr_infer_len.c $(BIN)/ww \
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$(LIB)/libwwrt.a | $(BIN)
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$(CC) $(CFLAGS) -o $@ $<
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$(BIN)/test_def_arr_len: test/wcc/816_def_arr_len.c $(BIN)/ww \
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$(BIN)/w6c $(BIN)/w6a $(BIN)/w6l \
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$(BIN)/ww_ww $(BIN)/w6c_ww $(BIN)/w6a_ww $(BIN)/w6l_ww \
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$(LIB)/libwwrt.a | $(BIN)
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$(CC) $(CFLAGS) -o $@ $<
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$(BIN)/test_arr_tagged_elem: test/wcc/685_arr_tagged_elem.c $(BIN)/ww \
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$(BIN)/w6c $(BIN)/w6a $(BIN)/w6l \
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$(BIN)/ww_ww $(BIN)/w6c_ww $(BIN)/w6a_ww $(BIN)/w6l_ww \
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@@ -24962,6 +24962,37 @@ fn cgdot(c: *cgen, n: *node) void = {
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};
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};
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};
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// GAP-A (#7 def-twin): `def NAME: [N]T = arrlit;` `.len` = static
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// elem count. The let-global arm above resolves via letvartnode
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// (c.lets only); a def lives in c.defs, misses it, and falls to the
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// SB fallback → MOVQ len(SB) (w6l: undefined 'len'). cstage cgen.c
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// emits MOVQ $alen here. defvartnode is the def-side mirror of
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// letvartnode (returns dtnode = the N_TARRAY whose .rhs length child
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// is #11-stamped). `.ptr`/`.cap` are NOT mirrored: cstage's def .ptr
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// is itself buggy (LEAQ (BP), task GAP-A.ptr) and arrays have no
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// .cap (cstage rejects, task GAP-A.cap).
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if (lhs != nil) {
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if (lhs.kind == nkind.N_IDENT) {
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if (streq(fld, "len")) {
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let dtn: *node = defvartnode(c, lhs.str);
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if (dtn != nil) {
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if (dtn.kind == nkind.N_TARRAY) {
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let lenn: *node = dtn.rhs;
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let alen: i64 = 0i64;
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if (lenn != nil) {
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if (lenn.kind == nkind.N_INTLIT) {
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alen = lenn.uval: i64;
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};
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};
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emitline("\tMOVQ\t$");
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emitint(alen);
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emitline(", AX\n");
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return;
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};
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};
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};
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};
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};
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// Top-level TUPLE global positional read (C-t3, #48): `g.N` —
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// LEAQ name(SB) into CX, then load at the element's SLOT offset
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// (C-t0 layout), the element's natural width. Mirrors the local
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@@ -3455,6 +3455,37 @@ fn cgdot(c: *cgen, n: *node) void = {
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};
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};
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};
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// GAP-A (#7 def-twin): `def NAME: [N]T = arrlit;` `.len` = static
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// elem count. The let-global arm above resolves via letvartnode
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// (c.lets only); a def lives in c.defs, misses it, and falls to the
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// SB fallback → MOVQ len(SB) (w6l: undefined 'len'). cstage cgen.c
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// emits MOVQ $alen here. defvartnode is the def-side mirror of
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// letvartnode (returns dtnode = the N_TARRAY whose .rhs length child
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// is #11-stamped). `.ptr`/`.cap` are NOT mirrored: cstage's def .ptr
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// is itself buggy (LEAQ (BP), task GAP-A.ptr) and arrays have no
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// .cap (cstage rejects, task GAP-A.cap).
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if (lhs != nil) {
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if (lhs.kind == nkind.N_IDENT) {
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if (streq(fld, "len")) {
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let dtn: *node = defvartnode(c, lhs.str);
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if (dtn != nil) {
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if (dtn.kind == nkind.N_TARRAY) {
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let lenn: *node = dtn.rhs;
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let alen: i64 = 0i64;
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if (lenn != nil) {
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if (lenn.kind == nkind.N_INTLIT) {
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alen = lenn.uval: i64;
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};
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};
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emitline("\tMOVQ\t$");
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emitint(alen);
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emitline(", AX\n");
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return;
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};
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};
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};
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};
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};
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// Top-level TUPLE global positional read (C-t3, #48): `g.N` —
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// LEAQ name(SB) into CX, then load at the element's SLOT offset
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// (C-t0 layout), the element's natural width. Mirrors the local
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@@ -24962,6 +24962,37 @@ fn cgdot(c: *cgen, n: *node) void = {
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};
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};
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};
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// GAP-A (#7 def-twin): `def NAME: [N]T = arrlit;` `.len` = static
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// elem count. The let-global arm above resolves via letvartnode
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// (c.lets only); a def lives in c.defs, misses it, and falls to the
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// SB fallback → MOVQ len(SB) (w6l: undefined 'len'). cstage cgen.c
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// emits MOVQ $alen here. defvartnode is the def-side mirror of
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// letvartnode (returns dtnode = the N_TARRAY whose .rhs length child
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// is #11-stamped). `.ptr`/`.cap` are NOT mirrored: cstage's def .ptr
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// is itself buggy (LEAQ (BP), task GAP-A.ptr) and arrays have no
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// .cap (cstage rejects, task GAP-A.cap).
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if (lhs != nil) {
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if (lhs.kind == nkind.N_IDENT) {
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if (streq(fld, "len")) {
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let dtn: *node = defvartnode(c, lhs.str);
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if (dtn != nil) {
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if (dtn.kind == nkind.N_TARRAY) {
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let lenn: *node = dtn.rhs;
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let alen: i64 = 0i64;
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if (lenn != nil) {
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if (lenn.kind == nkind.N_INTLIT) {
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alen = lenn.uval: i64;
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};
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};
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emitline("\tMOVQ\t$");
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emitint(alen);
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emitline(", AX\n");
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return;
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};
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};
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};
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};
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};
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// Top-level TUPLE global positional read (C-t3, #48): `g.N` —
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// LEAQ name(SB) into CX, then load at the element's SLOT offset
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// (C-t0 layout), the element's natural width. Mirrors the local
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242
test/wcc/816_def_arr_len.c
Normal file
242
test/wcc/816_def_arr_len.c
Normal file
@@ -0,0 +1,242 @@
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/*
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* 816_def_arr_len — cstage and wwstage agree, byte-for-byte and at runtime,
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* that `.len` on a module-level `def NAME: [N]T = [...]` array is the static
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* element count (an immediate `MOVQ $alen, AX`).
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*
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* The bug (GAP-A.len, WWSTAGE-ONLY): the #7 let-global `.len` cgdot arm in
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* selfhost/cmd/wcc/cgenexpr.ww gated on letvartnode (c.lets only). A `def`
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* lives in c.defs, missed that arm, and fell through to the module-qualified
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* SB fallback that mis-emitted `MOVQ len(SB)` → w6l: undefined reference to
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* 'len' (a build/link failure, not silent). cstage cgen.c already emitted the
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* immediate, so the two stages also DIVERGED. The fix adds a def-twin `.len`
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* arm using defvartnode (the def-side mirror of letvartnode) — `.len` ONLY.
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*
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* SCOPE: `.len` only. `.ptr` (cstage itself emits LEAQ (BP), task GAP-A.ptr)
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* and `.cap` (arrays have no cap; cstage rejects, wwstage silently emits
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* garbage, task GAP-A.cap) are SEPARATE bugs, not mirrored here.
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*
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* Covers BOTH the explicit-length `def [3]int` and the inferred `def [_]int`
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* (#11-stamped) so the deftnode/.rhs immediate path is exercised for the
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* inference case too.
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*
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* row | shape | want
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* ---------------+---------------------------------------------+-----
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* explicit_len | def A: [3]int=[10,20,30], A.len | 3
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* infer_len | def B: [_]int=[1,2,3,4], B.len | 4
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* sum | A.len + B.len (ken oracle) | 7
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* one_elem | def C: [_]int=[9], C.len | 1
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* u8_len | def D: [_]u8=[1u8..5u8], D.len | 5
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*/
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include <unistd.h>
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#include <sys/stat.h>
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#include <sys/wait.h>
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static int
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runwait(const char *cmd)
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{
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int rc = system(cmd);
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if (rc == -1) return -1;
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if (WIFEXITED(rc)) return WEXITSTATUS(rc);
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return -1;
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}
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struct row { const char *label; const char *src; int want; };
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static const struct row rows[] = {
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{ "explicit_len",
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"package main;\n"
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"def A: [3]int = [10, 20, 30];\n"
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"export fn main() i32 = {\n"
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"\treturn A.len: i32;\n"
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"};\n",
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3 },
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{ "infer_len",
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"package main;\n"
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"def B: [_]int = [1, 2, 3, 4];\n"
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"export fn main() i32 = {\n"
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"\treturn B.len: i32;\n"
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"};\n",
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4 },
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/* ken oracle: explicit + inferred together = 7. */
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{ "sum",
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"package main;\n"
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"def A: [3]int = [10, 20, 30];\n"
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"def B: [_]int = [1, 2, 3, 4];\n"
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"export fn main() i32 = {\n"
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"\treturn (A.len: i32) + (B.len: i32);\n"
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"};\n",
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7 },
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{ "one_elem",
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"package main;\n"
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"def C: [_]int = [9];\n"
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"export fn main() i32 = {\n"
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"\treturn C.len: i32;\n"
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"};\n",
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1 },
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/* narrow stride — `.len` is a count, independent of element width. */
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{ "u8_len",
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"package main;\n"
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"def D: [_]u8 = [1u8, 2u8, 3u8, 4u8, 5u8];\n"
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"export fn main() i32 = {\n"
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"\treturn D.len: i32;\n"
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"};\n",
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5 },
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};
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static int
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run_driver(const char *driver, const struct row *r, int i)
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{
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char src[64], tmpdir[64], cmd[1024];
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snprintf(src, sizeof src, "/tmp/dal_%d_%d.ww", getpid(), i);
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snprintf(tmpdir, sizeof tmpdir, "/tmp/dal_%d_d_%d", getpid(), i);
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FILE *f = fopen(src, "wb");
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if (!f) return -1;
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fputs(r->src, f);
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fclose(f);
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mkdir(tmpdir, 0755);
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snprintf(cmd, sizeof cmd, "cd %s && %s build %s 2>/dev/null",
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tmpdir, driver, src);
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if (runwait(cmd) != 0) {
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fprintf(stderr, "row[%s]: build via %s failed\n",
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r->label, driver);
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unlink(src); rmdir(tmpdir);
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return -1;
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}
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const char *base = strrchr(src, '/');
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base = base ? base + 1 : src;
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char outbin[128];
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snprintf(outbin, sizeof outbin, "%s/%s", tmpdir, base);
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char *dot = strrchr(outbin, '.');
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if (dot && strcmp(dot, ".ww") == 0) *dot = '\0';
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int got = runwait(outbin);
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unlink(src); unlink(outbin); rmdir(tmpdir);
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return got;
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}
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/* asm_byte_identical — w6c vs w6c_ww .s for the same source must match.
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* Post-fix both stages emit `MOVQ $alen, AX`; the rule-10 convergence
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* invariant. */
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static int
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asm_byte_identical(const char *bin, const struct row *r, int i)
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{
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char src[64], cs[64], ws[64], cmd[1024];
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snprintf(src, sizeof src, "/tmp/dal_asm_%d_%d.ww", getpid(), i);
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snprintf(cs, sizeof cs, "/tmp/dal_asm_%d_%d_c.s", getpid(), i);
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snprintf(ws, sizeof ws, "/tmp/dal_asm_%d_%d_w.s", getpid(), i);
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FILE *f = fopen(src, "wb");
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if (!f) return -1;
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fputs(r->src, f);
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fclose(f);
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snprintf(cmd, sizeof cmd, "%s/w6c -o %s %s 2>/dev/null", bin, cs, src);
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if (runwait(cmd) != 0) {
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fprintf(stderr, "row[%s]: w6c errored\n", r->label);
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unlink(src);
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return -1;
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}
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snprintf(cmd, sizeof cmd, "%s/w6c_ww -o %s %s 2>/dev/null",
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bin, ws, src);
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if (runwait(cmd) != 0) {
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fprintf(stderr, "row[%s]: w6c_ww errored\n", r->label);
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unlink(src); unlink(cs);
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return -1;
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}
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FILE *fc = fopen(cs, "rb");
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FILE *fw = fopen(ws, "rb");
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int rc = 0;
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if (!fc || !fw) {
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rc = -1;
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} else {
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for (;;) {
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int a = fgetc(fc);
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int b = fgetc(fw);
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if (a != b) { rc = -1; break; }
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if (a == EOF) break;
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}
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}
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if (fc) fclose(fc);
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if (fw) fclose(fw);
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if (rc != 0)
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fprintf(stderr, "row[%s]: cstage vs wwstage asm differs\n",
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r->label);
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unlink(src); unlink(cs); unlink(ws);
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return rc;
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}
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int
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main(void)
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{
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const char *bin = getenv("BIN");
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if (!bin) bin = "out/bin";
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char absbin[1024];
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if (bin[0] != '/') {
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char cwd[1024];
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if (getcwd(cwd, sizeof cwd) == NULL) return 1;
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snprintf(absbin, sizeof absbin, "%s/%s", cwd, bin);
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bin = absbin;
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}
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char cdrv[1024];
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snprintf(cdrv, sizeof cdrv, "%s/ww", bin);
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char wdrv[1024];
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snprintf(wdrv, sizeof wdrv, "%s/ww_ww", bin);
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struct { const char *name; const char *path; int gated_on_existence; }
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drivers[] = {
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{ "cstage", cdrv, 0 },
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{ "wwstage", wdrv, 1 },
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{ NULL, NULL, 0 },
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};
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int n = (int)(sizeof rows / sizeof rows[0]);
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int total = 0, fail = 0;
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for (int d = 0; drivers[d].name; d++) {
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if (drivers[d].gated_on_existence
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&& access(drivers[d].path, X_OK) != 0) {
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fprintf(stderr, "def_arr_len: skip %s (no %s)\n",
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drivers[d].name, drivers[d].path);
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continue;
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}
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for (int i = 0; i < n; i++) {
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int got = run_driver(drivers[d].path, &rows[i], i);
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total++;
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if (got != rows[i].want) {
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fprintf(stderr,
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"def_arr_len[%s][%s]: exit=%d want=%d\n",
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drivers[d].name, rows[i].label,
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got, rows[i].want);
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fail++;
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}
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}
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}
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if (access(wdrv, X_OK) == 0) {
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for (int i = 0; i < n; i++) {
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total++;
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if (asm_byte_identical(bin, &rows[i], i) != 0)
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fail++;
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}
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}
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if (fail) {
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fprintf(stderr,
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"def_arr_len: %d/%d fixtures failed\n", fail, total);
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return 1;
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}
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printf("def_arr_len: %d/%d ok\n", total, total);
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return 0;
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}
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