test: migrate Fam11 float value tests to @test, keep ABI-conformance pins (#5-C4)

fold-2 chunk C4 (drew's Fam8-13 plan): 13 float value-row C drivers re-homed.
11 migrate to test/lang/*_test.ww @test row-tables (exact IEEE-bit asserts);
1 float-overflow reject row -> a runww //ww:error carrier. 956_tuprecv_f64
slims to a w6c_ww asserttyped pin (20 value rows -> @test; the stamp dimension
can't be a value/byte-id @test) -- mutation-proven non-vacuous (break #121
stamp -> RED 6/6 -> restore -> GREEN) + an in-test vacuity self-check.
946_structparam/structret stay whole: their SSE register-class .s-grep (SysV
ABI conformance, #165/#171a) is the genuine defect-guard, not @test-expressible.
Float was the predicted SSE-cursor byte-id hotspot -- zero fresh cs!=ww
surfaced; 951_f64cgen (cstage-only before) byte-ids clean. LANGBYTEID floor
82->93; test count 384->374 (10 deleted drivers; 956 + the 2 946 kept).
This commit is contained in:
2026-06-24 03:25:47 +09:00
parent 3ee1906497
commit 60dec4a6bf
24 changed files with 883 additions and 2711 deletions

View File

@@ -1,63 +1,22 @@
/*
* 956_tuprecv_f64_run — runtime + byte-id regression net for #105 and
* the #164 (#107) multi-float extension.
* 956_tuprecv_f64_run (SLIM PIN, #5-C4) — the #121 A-narrow asserttyped stamp
* dimension for the f64 tuple-receive DESTRUCTURE bindings. The runtime VALUE
* rows + cs==ww byte-id migrated to test/lang/tuprecv_f64_test.ww; what stays
* here is the one dimension test-lang has no channel for: a wwstage-STDERR grep
* that w6c_ww emits NO `asserttyped:` diagnostic on the un-annotated float
* destructure binding (the binding must carry a checker type stamp so cgen's
* class-aware spill fires). cstage has no ww asserttyped pass, so this is
* w6c_ww-only by construction (project memory: audit the *_ww binary).
*
* #164 (#107): a multi-float tuple return (e.g. (f64,f64)) mis-routes —
* the SEND emitted every float through X0 (cgexpr clobbers X0 per
* element), so two floats collided on X0 and the receive read both from
* X0. The fix gives the tuple return a SysV SSE cursor [X0,X1] parallel
* to the integer cursor [AX,DX,CX,R8]: a float rides the next XMM on an
* INDEPENDENT counter (ref/qbe/amd64/sysv.c retr). The SEND spills each
* float to @tupfscr as it walks (X0 is clobbered by later elements) and
* reloads X0/X1 by SSE index after the integer pops; every receive site
* (single-var 16B/32B, destructure, reassign) reads the float from its
* SSE-cursor reg. SSE caps at 2 (X0,X1) — (f64,f64,f64) is over-cap, so
* it returns via sret (#10 Fold A SEND + Fold B destructure RECEIVE); the
* f64x3_recv row asserts that round-trip works in both stages.
* NON-VACUITY (drew C4 mutation gate): the grep is LIVE — pre-stamp HEAD w6c_ww
* fires `asserttyped` on the f64 binding ident (nil n.type_), and the grep
* mechanically fires on a synthetic `asserttyped:` line (self-checked below at
* startup; a broken grep FAILS the test before any row runs).
*
* #105 (original): a tuple-from-call receive corrupts the f64 word when
* the callee is BRANCHED. Covers ALL THREE receive forms, which share the
* #83 tuple_rseq cursor and all carried the same defect:
* 1. SINGLE-VAR `let r = norm(); ...r.0` (cglet 16B-tuple branch)
* 2. DESTRUCTURE `let (m,i) = norm()` (N_MLET / cgmlet+tupstore)
* 3. REASSIGN `m,i = norm()` (N_MASSIGN / cgmassign+tupstore)
*
* Root (#105, a #103-FACE-Z regression): a (f64,i64)/(i64,f64) tuple
* returns its f64 word in X0 (the SSE return reg) and its integer word
* in an integer reg (tuple_rseq AX/DX). All three receives spilled the
* f64 word via MOVQ from the integer cursor — but that reg holds GARBAGE
* (the f64 is in X0). #103-FACE-Z's field read (MOVSD slot,X0) then read
* that garbage. The fix makes every receive spill CLASS-AWARE: an f64/f32
* word spills `MOVSD/MOVSS X0, slot`, an integer word spills `MOVQ
* <reg>, slot` (as before). cstage cgen.c (3 sites) + wwstage cgenstmt.ww
* (cglet branch + the shared tupstore helper, which covers cgmlet and
* cgmassign), identically.
*
* WHY BRANCHED CALLEES: a SINGLE-return callee masks the bug via
* register coincidence — a float-literal return leaves the f64 bit
* pattern in AX (literal materialise goes through AX), so MOVQ AX,slot
* happens to store the right bits; and X0 stays live to the receive. A
* BRANCHED / multi-statement callee whose f64 word is a non-literal
* (e.g. an f64 param) has an inner CALL clobber AX, so the integer-reg
* spill stores garbage. The bug rows below therefore all use branched
* callees with an f64-param word — single-return rows are gate-blind to
* #105 (this is the gate lesson the task pins).
*
* GATE-BLIND TO BYTE-ID ALONE: both stages are symmetric-WRONG on master
* (both emit MOVQ AX,slot), so the cs==ww .s gate HOLDS on master for
* the bug rows — they diverge only at RUNTIME. Each row carries BOTH
* dimensions (modelled on 954_tuprecv_run):
* (a) cstage `ww build` + run, asserting the exit code — this is what
* catches #105 (master returns the wrong exit).
* (b) w6c vs w6c_ww `.s` cmp — guards rule-10 (both stages fixed
* identically).
*
* CONTROL rows pin that the fix touches nothing else: an all-integer
* branched 2-tuple (correct pre- and post-fix; MOVQ path untouched), the
* destructure form `let (a,b)=mk()` (cgmlet, a separate path the fix
* does not touch), a single-return (f64,i64) field read (#103 FACE-Z
* shape, correct pre- and post-fix), and a bare 0f64 compare (#103
* FACE-X shape, no tuple involved).
* Slim sibling of the C2 precedent (954 ctl_destr's asserttyped sub-dimension,
* test/lang/tuprecv_test.ww). The 6 rows are the chk_stamped subset of the
* original 956 driver; non-float / control rows carry no stamp dimension and
* live only in the @test file.
*/
#include <stdio.h>
#include <stdlib.h>
@@ -74,73 +33,9 @@ runwait(const char *cmd)
return -1;
}
struct row {
const char *label;
const char *src;
int want_exit;
int chk_stamped;
int want_compile_fail; /* #164: loud-stop rows must NOT compile */
};
struct row { const char *label; const char *src; };
static const struct row rows[] = {
/* BUG — minimal repro. norm is BRANCHED (inner issub() CALL clobbers
* AX) and its f64 word is the param n, not a literal. Pre-fix the
* receive spills MOVQ AX,slot (garbage); r.0 != 16.0 -> return 1.
* Post-fix MOVSD X0,slot -> 16.0 -> return 0. */
{ "f64_i64_br",
"package main;\n"
"fn issub(n: f64) bool = { return false; };\n"
"fn norm(n: f64) (f64, i64) = {\n"
"\tif (issub(n)) { return (n*2.0, -52); };\n"
"\treturn (n, 0);\n"
"};\n"
"export fn main() i32 = {\n"
"\tconst r = norm(16.0);\n"
"\tconst m: f64 = r.0;\n"
"\tif (m != 16.0) { return 1; };\n"
"\treturn 0;\n"
"};\n", 0 },
/* BUG — deferred read. An intervening f64 CALL clobbers X0 AFTER the
* receive; the read of r.0 must come from the SPILLED slot, not a
* stale X0. Strongest catch: proves the spill happened at receive
* time and survives X0 clobber. */
{ "f64_i64_deferred",
"package main;\n"
"fn issub(n: f64) bool = { return false; };\n"
"fn norm(n: f64) (f64, i64) = {\n"
"\tif (issub(n)) { return (n*2.0, -52); };\n"
"\treturn (n, 0);\n"
"};\n"
"fn clob(x: f64) f64 = { return x + 1.0; };\n"
"export fn main() i32 = {\n"
"\tconst r = norm(16.0);\n"
"\tconst junk: f64 = clob(3.0);\n"
"\tconst m: f64 = r.0;\n"
"\tif (m != 16.0) { return 1; };\n"
"\tif (junk != 4.0) { return 2; };\n"
"\treturn 0;\n"
"};\n", 0 },
/* BUG — order-swap (i64, f64): f64 is word1, spilled from DX pre-fix
* (garbage; the f64 is in X0). Confirms the fix is position-aware:
* word1's f64 -> MOVSD X0, slot+8; word0's i64 -> MOVQ AX, slot+0. */
{ "i64_f64_br",
"package main;\n"
"fn issub(n: f64) bool = { return false; };\n"
"fn norm(n: f64) (i64, f64) = {\n"
"\tif (issub(n)) { return (-52, n*2.0); };\n"
"\treturn (0, n);\n"
"};\n"
"export fn main() i32 = {\n"
"\tconst r = norm(16.0);\n"
"\tconst i: i64 = r.0;\n"
"\tconst m: f64 = r.1;\n"
"\tif (m != 16.0) { return 1; };\n"
"\tif (i != 0) { return 2; };\n"
"\treturn 0;\n"
"};\n", 0 },
/* BUG — DESTRUCTURE form `let (m,i)=norm()` (N_MLET / cgmlet+tupstore).
* f64 binding m is element 0 (cursor AX); pre-fix MOVQ AX,slot stores
* garbage (issub clobbered AX). Post-fix MOVSD X0,slot. m=16.0, i=0. */
{ "destr_f64_i64_br",
"package main;\n"
"fn issub(n: f64) bool = { return false; };\n"
@@ -153,10 +48,7 @@ static const struct row rows[] = {
"\tif (m != 16.0) { return 1; };\n"
"\tif (i != 0) { return 2; };\n"
"\treturn 0;\n"
"};\n", 0, 1 },
/* BUG — DESTRUCTURE order-swap `let (i,m)=norm()`, (i64,f64). f64
* binding m is element 1 (cursor DX); pre-fix MOVQ DX,slot garbage,
* post-fix MOVSD X0,slot. i=0, m=16.0. */
"};\n" },
{ "destr_i64_f64_br",
"package main;\n"
"fn issub(n: f64) bool = { return false; };\n"
@@ -169,47 +61,7 @@ static const struct row rows[] = {
"\tif (m != 16.0) { return 1; };\n"
"\tif (i != 0) { return 2; };\n"
"\treturn 0;\n"
"};\n", 0, 1 },
/* BUG — REASSIGN form `m,i = norm()` (N_MASSIGN / cgmassign+tupstore)
* into pre-declared slots. Same f64-element-from-X0 defect. m=16.0. */
{ "massign_f64_i64_br",
"package main;\n"
"fn issub(n: f64) bool = { return false; };\n"
"fn norm(n: f64) (f64, i64) = {\n"
"\tif (issub(n)) { return (n*2.0, -52); };\n"
"\treturn (n, 0);\n"
"};\n"
"export fn main() i32 = {\n"
"\tlet m: f64 = 0.0;\n"
"\tlet i: i64 = 0;\n"
"\tm, i = norm(16.0);\n"
"\tif (m != 16.0) { return 1; };\n"
"\tif (i != 0) { return 2; };\n"
"\treturn 0;\n"
"};\n", 0 },
/* BUG — REASSIGN order-swap `i,m = norm()`, (i64,f64). f64 reassign
* target is element 1 (cursor DX). i=0, m=16.0. */
{ "massign_i64_f64_br",
"package main;\n"
"fn issub(n: f64) bool = { return false; };\n"
"fn norm(n: f64) (i64, f64) = {\n"
"\tif (issub(n)) { return (-52, n*2.0); };\n"
"\treturn (0, n);\n"
"};\n"
"export fn main() i32 = {\n"
"\tlet i: i64 = 0;\n"
"\tlet m: f64 = 0.0;\n"
"\ti, m = norm(16.0);\n"
"\tif (m != 16.0) { return 1; };\n"
"\tif (i != 0) { return 2; };\n"
"\treturn 0;\n"
"};\n", 0 },
/* #164 (#107) HEADLINE — multi-float (f64, f64), destructure. The
* callee is BRANCHED (issub CALL clobbers X0), so on master BOTH
* elements collide on X0: cgexpr(a) leaves a in X0, cgexpr(b)
* overwrites it, and every receive read spills from X0 -> x==y==b
* (5.0). Post-fix a rides the SSE cursor X0, b rides X1; the receive
* splits them. x=3.0, y=5.0. Pre-fix: x==5.0 -> return 1. */
"};\n" },
{ "f64f64_destr_br",
"package main;\n"
"fn issub(n: f64) bool = { return false; };\n"
@@ -222,46 +74,7 @@ static const struct row rows[] = {
"\tif (x != 3.0) { return 1; };\n"
"\tif (y != 5.0) { return 2; };\n"
"\treturn 0;\n"
"};\n", 0, 1 },
/* #164 HEADLINE — multi-float (f64, f64), SINGLE-VAR whole-tuple
* receive (`let r = pair(); r.0 / r.1`, the 16B rt16 branch). Same
* X0-collision on master; post-fix r.0 from X0, r.1 from X1. */
{ "f64f64_single_br",
"package main;\n"
"fn issub(n: f64) bool = { return false; };\n"
"fn pair(a: f64, b: f64) (f64, f64) = {\n"
"\tif (issub(a)) { return (a*2.0, b*2.0); };\n"
"\treturn (a, b);\n"
"};\n"
"export fn main() i32 = {\n"
"\tconst r = pair(3.0, 5.0);\n"
"\tconst x: f64 = r.0;\n"
"\tconst y: f64 = r.1;\n"
"\tif (x != 3.0) { return 1; };\n"
"\tif (y != 5.0) { return 2; };\n"
"\treturn 0;\n"
"};\n", 0 },
/* #164 HEADLINE — multi-float (f64, f64), REASSIGN into pre-declared
* slots (N_MASSIGN / cgmassign+tupstore). x=3.0, y=5.0. */
{ "f64f64_massign_br",
"package main;\n"
"fn issub(n: f64) bool = { return false; };\n"
"fn pair(a: f64, b: f64) (f64, f64) = {\n"
"\tif (issub(a)) { return (a*2.0, b*2.0); };\n"
"\treturn (a, b);\n"
"};\n"
"export fn main() i32 = {\n"
"\tlet x: f64 = 0.0;\n"
"\tlet y: f64 = 0.0;\n"
"\tx, y = pair(3.0, 5.0);\n"
"\tif (x != 3.0) { return 1; };\n"
"\tif (y != 5.0) { return 2; };\n"
"\treturn 0;\n"
"};\n", 0 },
/* #164 — INTERLEAVED (i64, f64, i64): kills naive position->reg. The
* two i64s ride the INTEGER cursor (AX,DX), the f64 the SSE cursor
* (X0) on an independent counter — so x=AX, z=DX, y=X0. 3-element
* destructure. x=3, y=2.0, z=7. */
"};\n" },
{ "i64_f64_i64_destr",
"package main;\n"
"fn issub(n: i64) bool = { return false; };\n"
@@ -275,11 +88,7 @@ static const struct row rows[] = {
"\tif (y != 2.0) { return 2; };\n"
"\tif (z != 7) { return 3; };\n"
"\treturn 0;\n"
"};\n", 0, 1 },
/* #164 — (f64, str): SSE + wide (24B {ptr,len,cap} header) coexist.
* The f64 rides the SSE cursor (X0); the str rides the INTEGER
* cursor (AX,DX,CX) since the float consumes no GP slot. Destructure
* form. f=4.0, s.len=5 ("hello"). */
"};\n" },
{ "f64_str_destr",
"package main;\n"
"fn issub(n: f64) bool = { return false; };\n"
@@ -292,14 +101,7 @@ static const struct row rows[] = {
"\tif (f != 4.0) { return 1; };\n"
"\tif (s.len != 5) { return 2; };\n"
"\treturn 0;\n"
"};\n", 0, 1 },
/* #164 STR-FIRST destructure (str, f64): the unification's new-
* coverage shape with the wide header in slot 0. The str rides the
* INTEGER cursor (AX,DX,CX = ptr,len,cap), the f64 the SSE cursor (X0)
* — independent counters, the float consuming no GP slot. The
* destructure path's cursor handled str-first on master too, so this
* pins the dual-cursor restructure PRESERVED it (byte-id both ways)
* AND that the f64 coexists. s.len=5 ("hello"), f=4.0. */
"};\n" },
{ "str_f64_destr",
"package main;\n"
"fn issub(n: f64) bool = { return false; };\n"
@@ -312,140 +114,12 @@ static const struct row rows[] = {
"\tif (s.len != 5) { return 1; };\n"
"\tif (f != 4.0) { return 2; };\n"
"\treturn 0;\n"
"};\n", 0, 1 },
/* #164 STR-FIRST destructure (str, i64): pure-integer str-first.
* str@AX,DX,CX then i64@R8. Correct on master too (single-cursor
* destructure already routed ptr=AX) — byte-id regression guard that
* the dual cursor left the integer str-first mapping intact. s.len=5,
* k=7. */
{ "str_i64_destr",
"package main;\n"
"fn issub(n: i64) bool = { return false; };\n"
"fn si(n: i64) (str, i64) = {\n"
"\tif (issub(n)) { return (\"x\", n*2); };\n"
"\treturn (\"hello\", n);\n"
"};\n"
"export fn main() i32 = {\n"
"\tlet (s, k) = si(7);\n"
"\tif (s.len != 5) { return 1; };\n"
"\tif (k != 7) { return 2; };\n"
"\treturn 0;\n"
"};\n", 0 },
/* #164 STR-FIRST SINGLE-VAR (str, i64), annotated `let t: (str,i64) =
* si(); t.0/t.1`: the shape the OLD 32B single-var branch got WRONG —
* it read .ptr from DX while the send placed .ptr in AX (self-
* inconsistent), scrambling the slot so t.1 read the str.ptr word.
* DISCRIMINATES: pre-fix t.1 = a large address != 7; post-fix the
* unified dual cursor lands str@AX,DX,CX + i64@R8 so t.1=7. Both
* stages were wrong IDENTICALLY pre-fix (byte-id held, runtime broke),
* right identically post-fix. Annotated (not bare `const r=`) because
* the wwstage 32B single-var branch keys on the N_TTUPLE type node —
* a bare 32B single-var is a pre-existing stage asymmetry out of #164
* scope (16B bare single-var rows above cover the inferred path). */
{ "str_i64_single",
"package main;\n"
"fn issub(n: i64) bool = { return false; };\n"
"fn si(n: i64) (str, i64) = {\n"
"\tif (issub(n)) { return (\"x\", n*2); };\n"
"\treturn (\"hello\", n);\n"
"};\n"
"export fn main() i32 = {\n"
"\tlet t: (str, i64) = si(7);\n"
"\tif (t.1 != 7) { return 1; };\n"
"\tif (t.0.len != 5) { return 2; };\n"
"\treturn 0;\n"
"};\n", 0 },
/* #10 OVER-CAP RECV — three f64 = 0 GP / 3 SSE exceeds the SSE return
* cap (X0,X1 only). #164 loud-stopped this at the SEND; #10 Fold A
* sret's it (callee stores X0/X1 → @sretarg at foff 0/8/16) and Fold B
* destructures it (each element MOVSD'd out of @sretscr into its
* binding), so it is now a working round-trip in BOTH stages. */
{ "f64x3_recv",
"package main;\n"
"fn tri(a: f64, b: f64, c: f64) (f64, f64, f64) = {\n"
"\treturn (a, b, c);\n"
"};\n"
"export fn main() i32 = {\n"
"\tlet (x, y, z) = tri(1.0, 2.0, 3.0);\n"
"\tif (x != 1.0) { return 1; };\n"
"\tif (y != 2.0) { return 2; };\n"
"\tif (z != 3.0) { return 3; };\n"
"\treturn 0;\n"
"};\n", 0, 0, 0 },
/* CONTROL — all-integer branched 2-tuple. The integer-cursor MOVQ
* path is untouched by the fix (e0/e1 not float), so this is correct
* pre- and post-fix and byte-id both ways. a=5, b=7 -> 12. */
{ "ctl_int_br",
"package main;\n"
"fn issub(n: i64) bool = { return false; };\n"
"fn mk(n: i64) (i64, i64) = {\n"
"\tif (issub(n)) { return (n*2, -1); };\n"
"\treturn (n, 7);\n"
"};\n"
"export fn main() i32 = {\n"
"\tconst r = mk(5);\n"
"\tconst a: i64 = r.0;\n"
"\tconst b: i64 = r.1;\n"
"\treturn (a: i32) + (b: i32);\n"
"};\n", 12 },
/* CONTROL — destructure-with-NO-f64 `let (a,b)=mk()`. The fix now
* touches cgmlet/tupstore, but an all-integer element takes the
* unchanged MOVQ path, so this stays byte-id and correct pre- and
* post-fix — guards that the class check doesn't perturb integers.
* a=5, b=7 -> 12. */
{ "ctl_destr",
"package main;\n"
"fn issub(n: i64) bool = { return false; };\n"
"fn mk(n: i64) (i64, i64) = {\n"
"\tif (issub(n)) { return (n*2, -1); };\n"
"\treturn (n, 7);\n"
"};\n"
"export fn main() i32 = {\n"
"\tlet (a, b) = mk(5);\n"
"\treturn (a: i32) + (b: i32);\n"
"};\n", 12 },
/* CONTROL — #103 FACE-Z single-return (f64,i64) field read. The f64
* word is a literal, so AX coincidentally holds its bits on master;
* correct pre- and post-fix (the fix changes MOVQ AX,slot -> MOVSD
* X0,slot but the run result is unchanged). f=2.5->2, i=7 -> 9. */
{ "ctl_facez_single",
"package main;\n"
"fn mk() (f64, i64) = { return (2.5, 7); };\n"
"export fn main() i32 = {\n"
"\tconst t = mk();\n"
"\tconst f: f64 = t.0;\n"
"\tconst i: i64 = t.1;\n"
"\treturn (f: i32) + (i: i32);\n"
"};\n", 9 },
/* CONTROL — #103 FACE-X bare 0f64 compare (no tuple). The fix does
* not touch the compare path; pure no-op guard. -> 0. */
{ "ctl_facex_0f64",
"package main;\n"
"export fn main() i32 = {\n"
"\tconst z: f64 = 0.0;\n"
"\tif (z != 0.0) { return 1; };\n"
"\treturn 0;\n"
"};\n", 0 },
{ NULL, NULL, 0 }
"};\n" },
{ NULL, NULL }
};
static int
slurp_eq(const char *a, const char *b)
{
FILE *fa = fopen(a, "rb");
FILE *fb = fopen(b, "rb");
if (!fa || !fb) { if (fa) fclose(fa); if (fb) fclose(fb); return -1; }
int rc = 0;
for (;;) {
int ca = fgetc(fa);
int cb = fgetc(fb);
if (ca != cb) { rc = -1; break; }
if (ca == EOF) break;
}
fclose(fa); fclose(fb);
return rc;
}
/* The asserttyped diagnostic only appears in w6c_ww (the wwstage checker audit);
* an absent w6c_ww means the gate cannot run — fail loud. */
int
main(void)
{
@@ -459,141 +133,68 @@ main(void)
bin = absbin;
}
char w6c[1100], w6c_ww[1100];
snprintf(w6c, sizeof w6c, "%s/w6c", bin);
char w6c_ww[1100];
snprintf(w6c_ww, sizeof w6c_ww, "%s/w6c_ww", bin);
if (access(w6c_ww, X_OK) != 0) {
fprintf(stderr, "tuprecv_f64: w6c_ww missing — cannot run the "
"cs==ww byte-id gate\n");
"asserttyped stamp gate (the whole point of this pin)\n");
return 1;
}
int n = 0, fail = 0;
/* NON-VACUITY self-check: the grep must FIRE on a literal asserttyped
* line. A grep that never matches would pass every row vacuously. */
{
char probe[80], cmd[160];
snprintf(probe, sizeof probe, "/tmp/wwtupf_probe_%d.txt", getpid());
FILE *p = fopen(probe, "wb");
if (!p) { fprintf(stderr, "tuprecv_f64: probe open failed\n"); return 1; }
fputs("error: asserttyped: e.type_ nil\n", p);
fclose(p);
snprintf(cmd, sizeof cmd, "grep -q asserttyped %s", probe);
if (runwait(cmd) != 0) {
fprintf(stderr, "tuprecv_f64: grep self-check FAILED — the "
"asserttyped gate is vacuous\n");
unlink(probe);
return 1;
}
unlink(probe);
}
for (int i = 0; rows[i].src; i++, n++) {
char tmpdir[64], src[128], outbin[128], rmcmd[160];
char tmpdir[64], src[128], errf[128], rmcmd[160], cmd[2048];
snprintf(tmpdir, sizeof tmpdir, "/tmp/wwtupf_%d_d_%d",
getpid(), i);
mkdir(tmpdir, 0755);
snprintf(src, sizeof src, "%s/wwtupf_%d_%d.ww",
tmpdir, getpid(), i);
snprintf(outbin, sizeof outbin, "%s/wwtupf_%d_%d",
tmpdir, getpid(), i);
snprintf(errf, sizeof errf, "%s/err", tmpdir);
snprintf(rmcmd, sizeof rmcmd, "rm -rf %s", tmpdir);
FILE *f = fopen(src, "wb");
if (f == NULL) { runwait(rmcmd); fail++; continue; }
fputs(rows[i].src, f);
fclose(f);
char cmd[2048];
/* #164 LOUD-STOP rows: the SSE-cap overflow must FAIL TO COMPILE
* in BOTH stages (rule-7). Assert (a) cstage `ww build` errors,
* and (b) w6c AND w6c_ww each return non-zero — proving the
* loud-stop fires symmetrically. No .s is produced, so the
* byte-id cmp is skipped. Discriminates against master, which
* has no SSE cap and builds the (mis)compile. */
if (rows[i].want_compile_fail) {
snprintf(cmd, sizeof cmd,
"%s/ww build -o %s %s >/dev/null 2>&1",
bin, outbin, src);
if (runwait(cmd) == 0) {
fprintf(stderr, "row[%s]: cstage build SUCCEEDED, "
"want loud-stop (SSE cap)\n", rows[i].label);
fail++;
}
snprintf(cmd, sizeof cmd, "%s -o /dev/null %s 2>/dev/null",
w6c, src);
if (runwait(cmd) == 0) {
fprintf(stderr, "row[%s]: w6c emitted .s, want "
"loud-stop\n", rows[i].label);
fail++;
}
snprintf(cmd, sizeof cmd, "%s -o /dev/null %s 2>/dev/null",
w6c_ww, src);
if (runwait(cmd) == 0) {
fprintf(stderr, "row[%s]: w6c_ww emitted .s, want "
"loud-stop\n", rows[i].label);
fail++;
}
runwait(rmcmd);
continue;
}
/* (a) cstage build + run in a scratch dir. */
snprintf(cmd, sizeof cmd, "%s/ww build -o %s %s",
bin, outbin, src);
if (runwait(cmd) != 0) {
fprintf(stderr, "row[%s]: cstage build failed\n",
snprintf(cmd, sizeof cmd, "%s -o /dev/null %s 2>%s",
w6c_ww, src, errf);
runwait(cmd);
snprintf(cmd, sizeof cmd, "grep -q asserttyped %s", errf);
if (runwait(cmd) == 0) {
fprintf(stderr, "row[%s]: w6c_ww emitted asserttyped "
"(destructure float binding unstamped)\n",
rows[i].label);
fail++;
runwait(rmcmd);
continue;
}
int got = runwait(outbin);
if (got != rows[i].want_exit) {
fprintf(stderr, "row[%s]: cstage exit %d, want %d\n",
rows[i].label, got, rows[i].want_exit);
fail++;
}
/* (b) cs==ww byte-id gate: emit .s from both stages, cmp. */
char cs_s[64], ws_s[64];
snprintf(cs_s, sizeof cs_s, "/tmp/wwtupf_%d_%d_cs.s",
getpid(), i);
snprintf(ws_s, sizeof ws_s, "/tmp/wwtupf_%d_%d_ww.s",
getpid(), i);
snprintf(cmd, sizeof cmd, "%s -o %s %s 2>/dev/null",
w6c, cs_s, src);
if (runwait(cmd) != 0) {
fprintf(stderr, "row[%s]: w6c failed\n", rows[i].label);
fail++; runwait(rmcmd); continue;
}
snprintf(cmd, sizeof cmd, "%s -o %s %s 2>/dev/null",
w6c_ww, ws_s, src);
if (runwait(cmd) != 0) {
fprintf(stderr, "row[%s]: w6c_ww failed\n",
rows[i].label);
fail++; runwait(rmcmd); unlink(cs_s); continue;
}
if (slurp_eq(cs_s, ws_s) != 0) {
fprintf(stderr,
"row[%s]: cstage/wwstage .s DIFFER (rule-10 "
"byte-id violation)\n", rows[i].label);
fail++;
}
/* (c) #121 A-narrow stamp gate: the un-annotated float-
* destructure binding must now carry a checker type stamp, so
* w6c_ww emits no `asserttyped:` diagnostic. Non-vacuous —
* pre-stamp (HEAD) w6c_ww fires asserttyped on the f64 binding
* ident (nil n.type_). */
if (rows[i].chk_stamped) {
char errf[80];
snprintf(errf, sizeof errf,
"/tmp/wwtupf_%d_%d_err.txt", getpid(), i);
snprintf(cmd, sizeof cmd,
"%s -o /dev/null %s 2>%s", w6c_ww, src, errf);
runwait(cmd);
snprintf(cmd, sizeof cmd,
"grep -q asserttyped %s", errf);
if (runwait(cmd) == 0) {
fprintf(stderr, "row[%s]: w6c_ww emitted "
"asserttyped (destructure binding "
"unstamped)\n", rows[i].label);
fail++;
}
unlink(errf);
}
runwait(rmcmd); unlink(cs_s); unlink(ws_s);
runwait(rmcmd);
}
if (fail) {
fprintf(stderr, "%d/%d tuple-receive-f64 tests failed\n",
fprintf(stderr, "%d/%d tuprecv_f64 asserttyped-stamp rows failed\n",
fail, n);
return 1;
}
printf("tuprecv_f64: %d/%d ok (cstage run + cs==ww byte-id)\n", n, n);
printf("tuprecv_f64: %d/%d ok (asserttyped stamp pin, w6c_ww)\n", n, n);
return 0;
}