wcc/cgen: #94 def-array indexed &-base leg (both-stage)
`&D[i]` over a module-level DEF array SEGV'd on BOTH stages: the TK_AMP N_INDEX N_IDENT base classify checked only the local and let legs, so a def-array base fell to a wrong else — cstage zero-based the addend (XORQ BX,BX -> wild pointer, cgen.c) while wwstage value-loaded the symbol (MOVQ name(SB) = D[0], not its address, cgenexpr.ww complex-base fallback). Divergent asm, both wild. Add one def-array leg per stage, mirroring the working let leg: - cs: `def_isarraydef(base) -> LEAQ name(SB),BX` alongside let_islet. - ww: the `defvartnode` fallback the read-side cgindex already takes (cgenexpr.ww:1762) -> N_TARRAY classifies isglobalarr -> LEAQ name(SB). The def DATA symbol already exists (plain &D + D[i]-read work), so once the base is the address the existing i*esz scale + ADDQ round-trips. cs and ww now emit BYTE-IDENTICAL LEAQ-SB asm — the both-broken -> both-correct convergence is the point (#263 class). Rows (944_def_amp_idx_run, all 0/0 byte-id): amp_int [3]int, amp_u32 [3]u32 esz=4 (narrow scale), amp_arg &D[2] as a func-arg; controls ctrl_plain (&D), ctrl_read (D[i]), ctrl_2d (&M[1][1]) keep working. *p spelled `let v: T = *p` — `*p: T` parses as `*(p: T)`. OUT (filed #112): &D[..] slicing a def-array is a distinct parse reject needing a Hare-fidelity ruling — not this leg.
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@@ -4248,7 +4248,14 @@ cgexpr(Cg *c, Node *n, Local *locals)
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amem(D_BP, boff),
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areg(D_BX));
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}
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} else if (let_islet(base->str)) {
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} else if (let_islet(base->str)
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|| def_isarraydef(base->str)) {
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/* #94: a def-array base has DATA at
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* masym(name) (emit_array_data, same as a
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* let) — its address is LEAQ name(SB), the
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* mirror of the let leg. Without this it
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* fell to the XORQ zero-base below = wild
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* pointer (&D[i] SEGV). */
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if (is_arr) {
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ins2(c, A_LEAQ,
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masym(c, base->str),
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