From 58641e97a5d2f053abd93f25aab34ab3201ca0d7 Mon Sep 17 00:00:00 2001 From: Hojun-Cho Date: Fri, 7 Aug 2026 23:48:36 +0900 Subject: [PATCH] cgen: narrow 2-byte deref stores in the wwstage assign arm The plain `*p = v` arm's storeop map handled 1- and 4-byte pointees but let a 2-byte one fall to MOVQ, an 8-byte over-store that clobbers six adjacent bytes (masked in the pinned fixture by the lone frame slot; loud with `&a[0]` of a [4]i16). cstage fldstoreop maps 2 to MOVW. Graduates r660_i16_out_param_negative. --- Makefile | 2 +- selfhost/cmd/wcc/cgenexpr.ww | 3 ++- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/Makefile b/Makefile index 4ab41e6a..4e734798 100644 --- a/Makefile +++ b/Makefile @@ -583,7 +583,7 @@ DATABYTEID_EXPECTED_MIN = 911 # When a compiler fix lands the entry fails demanding graduation out of # this list rather than silently widening coverage. Tracked with the #59 # divergence family. -DATABYTEID_DIVERGED = r660_i16_out_param_negative r71_tagged_return_scratch_mixed \ +DATABYTEID_DIVERGED = r71_tagged_return_scratch_mixed \ r76_typeeq_fn_diff_arity r76_typeeq_fn_diff_param_type \ r76_typeeq_fn_io_vtable_shape r76_typeeq_fn_variadic_vs_fixed \ r940_str_forrange_arg r989_libprecond_decodedsize_aligned diff --git a/selfhost/cmd/wcc/cgenexpr.ww b/selfhost/cmd/wcc/cgenexpr.ww index bedbdb1e..0a55c570 100644 --- a/selfhost/cmd/wcc/cgenexpr.ww +++ b/selfhost/cmd/wcc/cgenexpr.ww @@ -8955,7 +8955,8 @@ fn cgassign(c: *cgen, n: *syntax.node) void = { typenodeprimresolved(c, pe, &ps, &uns); }; if (ps == 1) { storeop = "MOVB"; } - else { if (ps == 4) { storeop = "MOVL"; }; }; + else { if (ps == 2) { storeop = "MOVW"; } + else { if (ps == 4) { storeop = "MOVL"; }; }; }; }; }; }; }; // A slice IS the same 3-word {ptr,len,cap}