selfhost+test: route N_DOT base through indexvaluetnode + scanlocals for N_INDEX-lhs cgassign chain (#28+#30)
Wwstage's N_INDEX-lhs cgassign dispatch chain had a triple-site N_DOT base gap (sister latents filed during #24 / #27 review): Read (#28): `obj.mat[i][k]` over a struct field mat: **u8. cgindex routes the outer N_INDEX's N_INDEX base through indexvaluetnode; the recursion bottomed out at the inner N_INDEX's N_DOT base with bt=nil. esz fell through to 8 + signed_elem to false — wwstage emitted a stray outer `MOVQ $8, CX; IMULQ CX, AX` plus `MOVQ (AX), AX` (8-byte read over a 1-byte u8) instead of cstage's bare `MOVZBQ (AX), AX`. Write (#30): `obj.arr[i] = v` over a struct field arr: [N]Tagged (e.g. (i64|str)). cgassign's N_DOT-base arm computed esz via indexbaseesz but never set elemtn, so the tagged-element store gate missed and the 24-byte tagged slot was overwritten by a single scalar MOVQ — wrong-width store + tag/payload junk in the upper 16 bytes. Cstage walks `n->lhs->type` directly via the typed AST (cmd/w6c/cgen.c idx_eff + the N_INDEX-lhs N_ASSIGN branch). Wwstage now mirrors via indexvaluetnode, which #24 (aa8ca47) introduced for the N_INDEX-base case; #28/#30 graduate it for N_DOT base via the existing dotfieldtnode helper. Bundle graduates N_DOT base for the entire N_INDEX-lhs cgassign chain: (a) indexvaluetnode in cgenutil.ww handles N_DOT base via dotfieldtnode; (b) cgassign N_DOT-base arm in cgenexpr.ww calls indexvaluetnode for elemtn; (c) scanlocals N_DOT-base arm in cgendecl.ww parallels the existing N_IDENT arm for tagscr-bump. Splits are bisect-incoherent: (b)-alone clobbers locals via under-sized frame, (a)-alone leaves the write path with wrong elemtn, (c)-alone has no consumer. Only the triple delivers a complete N_DOT-base graduation matching #24's N_INDEX-base pattern. Cstage's first-use+fail-loud strategy for @tagscr (#26 commit069548d) handles the N_DOT-base shape naturally; the scanlocals N_DOT arm is wwstage-specific. Long-term rule-10 convergence (wwstage DOWN from scanlocals to first-use+fail-loud on BOTH stages) is filed as task #15. Class A wwstage cgen UNDER. No in-tree consumer; sister latents filed during #24 + #27 reviews. Test 741_dotbase_chained pins the dispatch + cstage-byte-identical asm for both rows. Sister latent (filed): indexbaseesz has no N_TARRAY arm for scalar struct-field array writes — `s.arr: [N]i32` scalar write falls through to esz=8 on wwstage. No in-tree exerciser; tight scope kept here. 115/115 ok. ww2 == ww3 == ww4 byte-id.
This commit is contained in:
239
test/wcc/741_dotbase_chained.c
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239
test/wcc/741_dotbase_chained.c
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/*
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* 741_dotbase_chained — sentinel for #28 + #30. Pins wwstage's
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* `indexvaluetnode` to handle N_DOT base (graduates the helper #24
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* introduced for chained N_INDEX so the N_DOT base shape rides the
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* same path).
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*
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* Two sister latents, one helper graduation:
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*
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* Read (#28): `obj.mat[i][k]` where obj is a struct with field
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* `mat: **u8`. The outer N_INDEX's base is the inner N_INDEX,
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* whose base is N_DOT. cgindex routes through `indexvaluetnode`
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* for the inner base type; pre-fix `indexvaluetnode` only handled
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* N_IDENT + N_INDEX bases, so the recursion bottomed out at the
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* N_DOT base with bt=nil. esz fell through to 8 and signed_elem
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* to false — wwstage emitted a stray outer `MOVQ $8, CX; IMULQ
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* CX, AX` plus `MOVQ (AX), AX` (8-byte read over a 1-byte u8)
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* instead of cstage's bare `MOVZBQ (AX), AX`.
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*
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* Write (#30): `obj.arr[i] = v` where obj is a struct with field
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* `arr: [N]Tagged` (e.g. (i64|str)). cgassign's N_DOT-base arm
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* computed esz via `indexbaseesz` but never set `elemtn`, so the
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* tagged-element store gate (keyed on elemtn) missed and the
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* 24-byte tagged slot was overwritten by a single MOVQ scalar
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* store — wrong-width store + tag/payload junk in the upper
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* 16 bytes. The matching scanlocals pre-pass arm (cgendecl.ww)
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* was also missing N_DOT base, so post-elemtn-fix the @tagscr
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* slot allocated past the frame boundary and clobbered live
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* locals (s, i).
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*
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* Cstage walks `n->lhs->type` directly via the typed AST (cmd/w6c/
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* cgen.c idx_eff + the N_INDEX-lhs N_ASSIGN branch). Wwstage
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* mirrors via `indexvaluetnode`, which #24 introduced for the
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* N_INDEX-base case and #28/#30 now graduate for N_DOT base via
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* `dotfieldtnode` lookup.
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*
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* Class A wwstage cgen UNDER. No in-tree consumer; sister latents
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* filed during #24 + #27 reviews (commits aa8ca47, 3ba1922). This
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* sentinel is the sole exerciser of the shape.
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*
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* Per row: in the `probe` body, assert the dispatch-defining MOV
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* mnemonic + scaling is present, plus cstage vs wwstage asm is
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* byte-identical.
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*/
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include <unistd.h>
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#include <sys/wait.h>
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static int
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runwait(const char *cmd)
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{
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int rc = system(cmd);
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if (rc == -1) return -1;
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if (WIFEXITED(rc)) return WEXITSTATUS(rc);
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return -1;
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}
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/* `needle` = a substring that must appear in the probe body and
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* uniquely identifies the post-fix dispatch (narrow MOV mnemonic
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* for read, 24B element scale for tagged write).
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* `antineedle` = a substring that MUST NOT appear — pre-fix wwstage
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* regression marker. Empty string skips the anti-check (write row
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* relies on cmp -s byte-id to catch divergence, since the tagged-
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* store byte-copy legitimately contains MOVQ-store fragments). */
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struct row {
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const char *label;
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const char *src;
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const char *needle;
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const char *antineedle;
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};
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static const struct row rows[] = {
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/* Read: chained `obj.mat[i][k]` where mat: **u8. Post-fix wwstage
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* routes the inner N_INDEX's N_DOT base through indexvaluetnode →
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* dotfieldtnode, esz collapses to 1, outer load becomes MOVZBQ.
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* Pre-fix had stray `MOVQ (AX), AX` (8-byte read over u8). */
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{ "dotbase_chained_read",
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"type S = struct{ pad: i64, mat: **u8 };\n"
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"fn probe(s: *S) u8 = {\n"
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" let i: i32 = 0;\n"
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" let k: u64 = 0u64;\n"
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" return s.mat[i][k];\n"
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"};\n"
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"export fn main() i32 = { return 0; };\n",
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"\tMOVZBQ\t(AX), AX\n",
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"" },
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/* Write: `obj.arr[i] = v` where arr: [N](i64|str) — 24B tagged.
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* Post-fix wwstage: cgassign N_DOT arm sets elemtn → tagged-store
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* path → IMULQ $24 + byte-copy from scratch. Scanlocals N_DOT arm
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* pre-reserves @tagscr in the frame. Pre-fix: scalar `MOVQ AX,
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* (BX)` over the 24B slot. */
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{ "dotbase_array_tagged_write",
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"type T = (i64 | str);\n"
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"type S = struct{ pad: i64, arr: [4]T };\n"
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"fn probe(s: *S) void = {\n"
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" let i: i32 = 0;\n"
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" s.arr[i] = 42i64;\n"
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"};\n"
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"export fn main() i32 = { return 0; };\n",
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"\tMOVQ\t$24, CX\n",
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"" },
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};
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static int
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slurp(const char *path, char *buf, size_t cap)
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{
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FILE *f = fopen(path, "rb");
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if (!f) return -1;
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size_t n = fread(buf, 1, cap - 1, f);
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fclose(f);
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buf[n] = '\0';
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return (int)n;
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}
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static int
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emit_s(const char *w6c, const struct row *r, int i, char *out_s, size_t cap)
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{
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char src[96], cmd[1024];
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snprintf(src, sizeof src, "/tmp/dotbase_%d_%d.ww", getpid(), i);
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snprintf(out_s, cap, "/tmp/dotbase_%d_%d_%s.s",
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getpid(), i, w6c[strlen(w6c) - 1] == 'w' ? "ww" : "c");
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FILE *f = fopen(src, "wb");
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if (!f) return -1;
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fputs(r->src, f);
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fclose(f);
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snprintf(cmd, sizeof cmd, "%s -o %s %s 2>/dev/null", w6c, out_s, src);
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int rc = runwait(cmd);
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unlink(src);
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return rc;
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}
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/* Inside `TEXT probe`, the needle must appear and the antineedle
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* must NOT appear (anti-regression on pre-fix wwstage emit). */
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static int
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check_probe(const char *spath, const struct row *r, const char *stage)
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{
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char buf[1 << 14];
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if (slurp(spath, buf, sizeof buf) < 0) {
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fprintf(stderr, "row[%s][%s]: cannot read %s\n",
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r->label, stage, spath);
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return -1;
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}
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const char *fn = strstr(buf, "TEXT probe");
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if (!fn) {
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fprintf(stderr,
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"row[%s][%s]: no TEXT probe in %s\n",
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r->label, stage, spath);
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return -1;
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}
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const char *ret = strstr(fn, "\tRET\n");
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const char *m = strstr(fn, r->needle);
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if (!m || (ret && m > ret)) {
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fprintf(stderr,
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"row[%s][%s]: expected `%s` in probe body\n",
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r->label, stage, r->needle);
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return -1;
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}
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if (r->antineedle[0] != '\0') {
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const char *bad = strstr(fn, r->antineedle);
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if (bad && (!ret || bad < ret)) {
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fprintf(stderr,
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"row[%s][%s]: stray `%s` in probe body — "
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"pre-fix wwstage regression\n",
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r->label, stage, r->antineedle);
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return -1;
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};
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}
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return 0;
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}
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int
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main(void)
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{
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const char *bin = getenv("BIN");
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if (!bin) bin = "out/bin";
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char absbin[512];
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if (bin[0] != '/') {
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char cwd[256];
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if (getcwd(cwd, sizeof cwd) == NULL) return 1;
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snprintf(absbin, sizeof absbin, "%s/%s", cwd, bin);
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bin = absbin;
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}
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char w6c[640], w6c_ww[640];
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snprintf(w6c, sizeof w6c, "%s/w6c", bin);
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snprintf(w6c_ww, sizeof w6c_ww, "%s/w6c_ww", bin);
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int have_ww = (access(w6c_ww, X_OK) == 0);
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int n = (int)(sizeof rows / sizeof rows[0]);
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int total = 0, fail = 0;
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for (int i = 0; i < n; i++) {
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char cs_path[128], ws_path[128];
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if (emit_s(w6c, &rows[i], i, cs_path, sizeof cs_path) != 0) {
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fprintf(stderr,
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"dotbase_chained[cstage][%s]: w6c failed\n",
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rows[i].label);
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fail++; total++; continue;
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}
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total++;
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if (check_probe(cs_path, &rows[i], "cstage") != 0) fail++;
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if (!have_ww) { unlink(cs_path); continue; }
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if (emit_s(w6c_ww, &rows[i], i, ws_path, sizeof ws_path) != 0) {
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fprintf(stderr,
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"dotbase_chained[wwstage][%s]: w6c_ww failed\n",
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rows[i].label);
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fail++; total++;
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unlink(cs_path); continue;
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}
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total++;
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if (check_probe(ws_path, &rows[i], "wwstage") != 0) fail++;
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total++;
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char cmd[512];
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snprintf(cmd, sizeof cmd, "cmp -s %s %s", cs_path, ws_path);
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if (runwait(cmd) != 0) {
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fprintf(stderr,
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"dotbase_chained[%s]: cstage vs wwstage asm differs\n",
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rows[i].label);
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fail++;
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}
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unlink(cs_path); unlink(ws_path);
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}
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if (fail) {
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fprintf(stderr,
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"dotbase_chained: %d/%d fixtures failed\n", fail, total);
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return 1;
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}
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printf("dotbase_chained: %d/%d ok\n", total, total);
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return 0;
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}
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