From 7acbe8802648d9e41540f52726d63416a6a47228 Mon Sep 17 00:00:00 2001 From: Hojun-Cho Date: Thu, 5 Dec 2024 18:00:09 +0900 Subject: [PATCH] refactor a20.c --- boot/a20.c | 42 +++++++++++++++++++----------------------- 1 file changed, 19 insertions(+), 23 deletions(-) diff --git a/boot/a20.c b/boot/a20.c index 6279430..3fa537c 100644 --- a/boot/a20.c +++ b/boot/a20.c @@ -1,35 +1,31 @@ #include #include "fn.h" +#define I8042_DPORT 0x60 +#define I8042_SPORT 0x64 +#define I8042_CPORT 0x64 +#define I8042_IN_FULL 0x02 +#define I8042_DATA_FULL 0x01 +#define I8042_OUT 0xd1 +#define I8042_A20_UP 0xdf // 0xD0 | a20 | clock | buffer full IRQ1 +// https://wiki.osdev.org/%228042%22_PS/2_Controller#Initialising_the_PS/2_Controller + void a20up(void) { - struct{ - int dport, sport, cport; - u8 a20; - u8 dib, ib, wout; - } i8042 = { - .dport = 0x60, // data port - .sport = 0x64, // status register port - .cport = 0x64, // command register port - .a20 = 0xdf, // enable a20 line value - .dib = 0x01, // kbd data in buffer - .ib = 0x02, // kbd input buffer - .wout = 0xd1, // write output port value - }; - - while(inb(i8042.sport) & i8042.ib) + while(inb(I8042_SPORT) & I8042_IN_FULL) ; - while(inb(i8042.sport) & i8042.dib) - inb(i8042.dport); + while(inb(I8042_SPORT) & I8042_DATA_FULL) + inb(I8042_DPORT); - outb(i8042.cport, i8042.wout); - while(inb(i8042.sport) & i8042.ib) + outb(I8042_CPORT, I8042_OUT); + // wait until input buffer is empty + while(inb(I8042_SPORT) & I8042_IN_FULL) ; - outb(i8042.dport, i8042.a20); - while(inb(i8042.sport) & i8042.ib) + outb(I8042_DPORT, I8042_A20_UP); + while(inb(I8042_SPORT) & I8042_IN_FULL) ; - while(inb(i8042.sport) & i8042.dib) - inb(i8042.dport); + while(inb(I8042_SPORT) & I8042_DATA_FULL) + inb(I8042_DPORT); } \ No newline at end of file